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-rw-r--r--firmware/target/arm/imx233/system-imx233.c54
-rw-r--r--firmware/target/arm/imx233/system-target.h6
2 files changed, 48 insertions, 12 deletions
diff --git a/firmware/target/arm/imx233/system-imx233.c b/firmware/target/arm/imx233/system-imx233.c
index bcdb47ebaa..46574f4b33 100644
--- a/firmware/target/arm/imx233/system-imx233.c
+++ b/firmware/target/arm/imx233/system-imx233.c
@@ -35,6 +35,8 @@
35#include "icoll-imx233.h" 35#include "icoll-imx233.h"
36#include "lradc-imx233.h" 36#include "lradc-imx233.h"
37#include "rtc-imx233.h" 37#include "rtc-imx233.h"
38#include "power-imx233.h"
39#include "emi-imx233.h"
38#include "lcd.h" 40#include "lcd.h"
39#include "backlight-target.h" 41#include "backlight-target.h"
40#include "button.h" 42#include "button.h"
@@ -115,6 +117,14 @@ void system_init(void)
115 defined(CREATIVE_ZENXFI3) || defined(CREATIVE_ZENXFI2)) 117 defined(CREATIVE_ZENXFI3) || defined(CREATIVE_ZENXFI2))
116 fmradio_i2c_init(); 118 fmradio_i2c_init();
117#endif 119#endif
120 imx233_clkctrl_enable_auto_slow_monitor(AS_CPU_INSTR, true);
121 imx233_clkctrl_enable_auto_slow_monitor(AS_CPU_DATA, true);
122 imx233_clkctrl_enable_auto_slow_monitor(AS_TRAFFIC, true);
123 imx233_clkctrl_enable_auto_slow_monitor(AS_TRAFFIC_JAM, true);
124 imx233_clkctrl_enable_auto_slow_monitor(AS_APBXDMA, true);
125 imx233_clkctrl_enable_auto_slow_monitor(AS_APBHDMA, true);
126 imx233_clkctrl_set_auto_slow_divisor(AS_DIV_8);
127 imx233_clkctrl_enable_auto_slow(true);
118} 128}
119 129
120bool imx233_us_elapsed(uint32_t ref, unsigned us_delay) 130bool imx233_us_elapsed(uint32_t ref, unsigned us_delay)
@@ -151,18 +161,44 @@ void set_cpu_frequency(long frequency)
151{ 161{
152 switch(frequency) 162 switch(frequency)
153 { 163 {
154 #if 0
155 case IMX233_CPUFREQ_454_MHz: 164 case IMX233_CPUFREQ_454_MHz:
156 /* clk_h@clk_p/3 */ 165 /* go back to a known state: everything at 24MHz ! */
157 imx233_set_clock_divisor(CLK_AHB, 3); 166 imx233_clkctrl_set_bypass_pll(CLK_CPU, true);
158 /* clk_p@ref_cpu/1*18/19 */ 167 imx233_clkctrl_set_clock_divisor(CLK_HBUS, 1);
159 imx233_set_fractional_divisor(CLK_CPU, 19); 168 _logf("set freq 454MHz");
160 imx233_set_clock_divisor(CLK_CPU, 1); 169 /* set VDDD to 1.550 mV (brownout at 1.450 mV) */
170 imx233_power_set_regulator(REGULATOR_VDDD, 1550, 1450);
171 /* clk_h@clk_p/2 */
172 imx233_clkctrl_set_clock_divisor(CLK_HBUS, 3);
173 /* clk_p@ref_cpu/1*18/33 */
174 imx233_clkctrl_set_fractional_divisor(CLK_CPU, 19);
175 imx233_clkctrl_set_clock_divisor(CLK_CPU, 1);
176 imx233_clkctrl_set_bypass_pll(CLK_CPU, false);
161 /* ref_cpu@480 MHz 177 /* ref_cpu@480 MHz
162 * clk_p@454.74 MHz 178 * ref_emi@480 MHz
163 * clk_h@151.58 MHz */ 179 * clk_emi@130.91 MHz
180 * clk_p@261.82 MHz
181 * clk_h@130.91 MHz */
182 break;
183 case IMX233_CPUFREQ_261_MHz:
184 /* go back to a known state: everything at 24MHz ! */
185 imx233_clkctrl_set_bypass_pll(CLK_CPU, true);
186 imx233_clkctrl_set_clock_divisor(CLK_HBUS, 1);
187 _logf("set freq 261MHz");
188 /* set VDDD to 1.550 mV (brownout at 1.275 mV) */
189 imx233_power_set_regulator(REGULATOR_VDDD, 1275, 1175);
190 /* clk_h@clk_p/2 */
191 imx233_clkctrl_set_clock_divisor(CLK_HBUS, 2);
192 /* clk_p@ref_cpu/1*18/33 */
193 imx233_clkctrl_set_fractional_divisor(CLK_CPU, 33);
194 imx233_clkctrl_set_clock_divisor(CLK_CPU, 1);
195 imx233_clkctrl_set_bypass_pll(CLK_CPU, false);
196 /* ref_cpu@480 MHz
197 * ref_emi@480 MHz
198 * clk_emi@130.91 MHz
199 * clk_p@261.82 MHz
200 * clk_h@130.91 MHz */
164 break; 201 break;
165 #endif
166 default: 202 default:
167 break; 203 break;
168 } 204 }
diff --git a/firmware/target/arm/imx233/system-target.h b/firmware/target/arm/imx233/system-target.h
index 2e850e830d..5515597570 100644
--- a/firmware/target/arm/imx233/system-target.h
+++ b/firmware/target/arm/imx233/system-target.h
@@ -55,10 +55,10 @@
55#define IMX233_CPUFREQ_64_MHz 64000000 55#define IMX233_CPUFREQ_64_MHz 64000000
56#define IMX233_CPUFREQ_24_MHz 24000000 56#define IMX233_CPUFREQ_24_MHz 24000000
57 57
58#define CPUFREQ_DEFAULT IMX233_CPUFREQ_454_MHz 58#define CPUFREQ_DEFAULT IMX233_CPUFREQ_261_MHz
59#define CPUFREQ_NORMAL IMX233_CPUFREQ_454_MHz 59#define CPUFREQ_NORMAL IMX233_CPUFREQ_261_MHz
60#define CPUFREQ_MAX IMX233_CPUFREQ_454_MHz 60#define CPUFREQ_MAX IMX233_CPUFREQ_454_MHz
61#define CPUFREQ_SLEEP IMX233_CPUFREQ_454_MHz 61#define CPUFREQ_SLEEP IMX233_CPUFREQ_261_MHz
62 62
63void udelay(unsigned us); 63void udelay(unsigned us);
64bool imx233_us_elapsed(uint32_t ref, unsigned us_delay); 64bool imx233_us_elapsed(uint32_t ref, unsigned us_delay);