diff options
-rw-r--r-- | firmware/drivers/ata.c | 71 | ||||
-rw-r--r-- | firmware/target/arm/ata-target.h | 50 |
2 files changed, 50 insertions, 71 deletions
diff --git a/firmware/drivers/ata.c b/firmware/drivers/ata.c index 3874745711..babbab016a 100644 --- a/firmware/drivers/ata.c +++ b/firmware/drivers/ata.c | |||
@@ -80,54 +80,6 @@ | |||
80 | #define SET_REG(reg,val) reg = ((val) << 8) | 80 | #define SET_REG(reg,val) reg = ((val) << 8) |
81 | #define SET_16BITREG(reg,val) reg = (val) | 81 | #define SET_16BITREG(reg,val) reg = (val) |
82 | 82 | ||
83 | #elif (CONFIG_CPU == PP5002) || (CONFIG_CPU == PP5020) | ||
84 | |||
85 | /* Plain C read & write loops */ | ||
86 | #define PREFER_C_READING | ||
87 | #define PREFER_C_WRITING | ||
88 | |||
89 | #if (CONFIG_CPU == PP5002) | ||
90 | #define ATA_IOBASE 0xc00031e0 | ||
91 | #define ATA_CONTROL (*((volatile unsigned char*)(0xc00033f8))) | ||
92 | #elif (CONFIG_CPU == PP5020) | ||
93 | #define ATA_IOBASE 0xc30001e0 | ||
94 | #define ATA_CONTROL (*((volatile unsigned char*)(0xc30003f8))) | ||
95 | #endif | ||
96 | |||
97 | #define ATA_DATA (*((volatile unsigned short*)(ATA_IOBASE))) | ||
98 | #define ATA_ERROR (*((volatile unsigned char*)(ATA_IOBASE + 0x04))) | ||
99 | #define ATA_NSECTOR (*((volatile unsigned char*)(ATA_IOBASE + 0x08))) | ||
100 | #define ATA_SECTOR (*((volatile unsigned char*)(ATA_IOBASE + 0x0c))) | ||
101 | #define ATA_LCYL (*((volatile unsigned char*)(ATA_IOBASE + 0x10))) | ||
102 | #define ATA_HCYL (*((volatile unsigned char*)(ATA_IOBASE + 0x14))) | ||
103 | #define ATA_SELECT (*((volatile unsigned char*)(ATA_IOBASE + 0x18))) | ||
104 | #define ATA_COMMAND (*((volatile unsigned char*)(ATA_IOBASE + 0x1c))) | ||
105 | |||
106 | #define STATUS_BSY 0x80 | ||
107 | #define STATUS_RDY 0x40 | ||
108 | #define STATUS_DF 0x20 | ||
109 | #define STATUS_DRQ 0x08 | ||
110 | #define STATUS_ERR 0x01 | ||
111 | #define ERROR_ABRT 0x04 | ||
112 | |||
113 | #define WRITE_PATTERN1 0xa5 | ||
114 | #define WRITE_PATTERN2 0x5a | ||
115 | #define WRITE_PATTERN3 0xaa | ||
116 | #define WRITE_PATTERN4 0x55 | ||
117 | |||
118 | #define READ_PATTERN1 0xa5 | ||
119 | #define READ_PATTERN2 0x5a | ||
120 | #define READ_PATTERN3 0xaa | ||
121 | #define READ_PATTERN4 0x55 | ||
122 | |||
123 | #define READ_PATTERN1_MASK 0xff | ||
124 | #define READ_PATTERN2_MASK 0xff | ||
125 | #define READ_PATTERN3_MASK 0xff | ||
126 | #define READ_PATTERN4_MASK 0xff | ||
127 | |||
128 | #define SET_REG(reg,val) reg = (val) | ||
129 | #define SET_16BITREG(reg,val) reg = (val) | ||
130 | |||
131 | #elif CONFIG_CPU == SH7034 | 83 | #elif CONFIG_CPU == SH7034 |
132 | 84 | ||
133 | /* asm optimised read & write loops */ | 85 | /* asm optimised read & write loops */ |
@@ -1685,9 +1637,6 @@ void ata_enable(bool on) | |||
1685 | or_l(0x00040000, &GPIO_FUNCTION); | 1637 | or_l(0x00040000, &GPIO_FUNCTION); |
1686 | #elif CONFIG_CPU == TCC730 | 1638 | #elif CONFIG_CPU == TCC730 |
1687 | 1639 | ||
1688 | #elif (CONFIG_CPU == PP5002) || (CONFIG_CPU == PP5020) | ||
1689 | /* TODO: Implement ata_enable() */ | ||
1690 | (void)on; | ||
1691 | #endif | 1640 | #endif |
1692 | } | 1641 | } |
1693 | #endif | 1642 | #endif |
@@ -1841,12 +1790,6 @@ int ata_init(void) | |||
1841 | bool coldstart = (P1 & 0x80) == 0; | 1790 | bool coldstart = (P1 & 0x80) == 0; |
1842 | #elif defined(IRIVER_H100_SERIES) || defined(IRIVER_H300_SERIES) | 1791 | #elif defined(IRIVER_H100_SERIES) || defined(IRIVER_H300_SERIES) |
1843 | bool coldstart = (GPIO_FUNCTION & 0x00080000) == 0; | 1792 | bool coldstart = (GPIO_FUNCTION & 0x00080000) == 0; |
1844 | #elif (CONFIG_CPU == PP5002) || (CONFIG_CPU == PP5020) | ||
1845 | bool coldstart = false; | ||
1846 | /* TODO: Implement coldstart variable */ | ||
1847 | #elif defined(TOSHIBA_GIGABEAT_F) | ||
1848 | /* TODO */ | ||
1849 | bool coldstart = true; | ||
1850 | #else | 1793 | #else |
1851 | bool coldstart = (PACR2 & 0x4000) != 0; | 1794 | bool coldstart = (PACR2 & 0x4000) != 0; |
1852 | #endif | 1795 | #endif |
@@ -1876,20 +1819,6 @@ int ata_init(void) | |||
1876 | or_l(0x00080000, &GPIO_FUNCTION); | 1819 | or_l(0x00080000, &GPIO_FUNCTION); |
1877 | 1820 | ||
1878 | /* FYI: The IDECONFIGx registers are set by set_cpu_frequency() */ | 1821 | /* FYI: The IDECONFIGx registers are set by set_cpu_frequency() */ |
1879 | #elif CONFIG_CPU == PP5002 | ||
1880 | /* From ipod-ide.c:ipod_ide_register() */ | ||
1881 | outl(inl(0xc0003024) | (1 << 7), 0xc0003024); | ||
1882 | outl(inl(0xc0003024) & ~(1<<2), 0xc0003024); | ||
1883 | |||
1884 | outl(0x10, 0xc0003000); | ||
1885 | outl(0x80002150, 0xc0003004); | ||
1886 | #elif CONFIG_CPU == PP5020 | ||
1887 | /* From ipod-ide.c:ipod_ide_register() */ | ||
1888 | outl(inl(0xc3000028) | (1 << 5), 0xc3000028); | ||
1889 | outl(inl(0xc3000028) & ~0x10000000, 0xc3000028); | ||
1890 | |||
1891 | outl(0x10, 0xc3000000); | ||
1892 | outl(0x80002150, 0xc3000004); | ||
1893 | #endif | 1822 | #endif |
1894 | 1823 | ||
1895 | sleeping = false; | 1824 | sleeping = false; |
diff --git a/firmware/target/arm/ata-target.h b/firmware/target/arm/ata-target.h index 417485fb8a..0e4c187e27 100644 --- a/firmware/target/arm/ata-target.h +++ b/firmware/target/arm/ata-target.h | |||
@@ -17,6 +17,56 @@ | |||
17 | * | 17 | * |
18 | ****************************************************************************/ | 18 | ****************************************************************************/ |
19 | 19 | ||
20 | #if (CONFIG_CPU == PP5002) || (CONFIG_CPU == PP5020) | ||
21 | |||
22 | /* Plain C read & write loops */ | ||
23 | #define PREFER_C_READING | ||
24 | #define PREFER_C_WRITING | ||
25 | |||
26 | #if (CONFIG_CPU == PP5002) | ||
27 | #define ATA_IOBASE 0xc00031e0 | ||
28 | #define ATA_CONTROL (*((volatile unsigned char*)(0xc00033f8))) | ||
29 | #elif (CONFIG_CPU == PP5020) | ||
30 | #define ATA_IOBASE 0xc30001e0 | ||
31 | #define ATA_CONTROL (*((volatile unsigned char*)(0xc30003f8))) | ||
32 | #endif | ||
33 | |||
34 | #define ATA_DATA (*((volatile unsigned short*)(ATA_IOBASE))) | ||
35 | #define ATA_ERROR (*((volatile unsigned char*)(ATA_IOBASE + 0x04))) | ||
36 | #define ATA_NSECTOR (*((volatile unsigned char*)(ATA_IOBASE + 0x08))) | ||
37 | #define ATA_SECTOR (*((volatile unsigned char*)(ATA_IOBASE + 0x0c))) | ||
38 | #define ATA_LCYL (*((volatile unsigned char*)(ATA_IOBASE + 0x10))) | ||
39 | #define ATA_HCYL (*((volatile unsigned char*)(ATA_IOBASE + 0x14))) | ||
40 | #define ATA_SELECT (*((volatile unsigned char*)(ATA_IOBASE + 0x18))) | ||
41 | #define ATA_COMMAND (*((volatile unsigned char*)(ATA_IOBASE + 0x1c))) | ||
42 | |||
43 | #define STATUS_BSY 0x80 | ||
44 | #define STATUS_RDY 0x40 | ||
45 | #define STATUS_DF 0x20 | ||
46 | #define STATUS_DRQ 0x08 | ||
47 | #define STATUS_ERR 0x01 | ||
48 | #define ERROR_ABRT 0x04 | ||
49 | |||
50 | #define WRITE_PATTERN1 0xa5 | ||
51 | #define WRITE_PATTERN2 0x5a | ||
52 | #define WRITE_PATTERN3 0xaa | ||
53 | #define WRITE_PATTERN4 0x55 | ||
54 | |||
55 | #define READ_PATTERN1 0xa5 | ||
56 | #define READ_PATTERN2 0x5a | ||
57 | #define READ_PATTERN3 0xaa | ||
58 | #define READ_PATTERN4 0x55 | ||
59 | |||
60 | #define READ_PATTERN1_MASK 0xff | ||
61 | #define READ_PATTERN2_MASK 0xff | ||
62 | #define READ_PATTERN3_MASK 0xff | ||
63 | #define READ_PATTERN4_MASK 0xff | ||
64 | |||
65 | #define SET_REG(reg,val) reg = (val) | ||
66 | #define SET_16BITREG(reg,val) reg = (val) | ||
67 | |||
68 | #endif | ||
69 | |||
20 | void ata_reset(void); | 70 | void ata_reset(void); |
21 | void ata_enable(bool on); | 71 | void ata_enable(bool on); |
22 | bool ata_is_coldstart(void); | 72 | bool ata_is_coldstart(void); |