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-rw-r--r--firmware/target/mips/ingenic_x1000/app.lds18
1 files changed, 13 insertions, 5 deletions
diff --git a/firmware/target/mips/ingenic_x1000/app.lds b/firmware/target/mips/ingenic_x1000/app.lds
index ead88565c4..5b43f9576e 100644
--- a/firmware/target/mips/ingenic_x1000/app.lds
+++ b/firmware/target/mips/ingenic_x1000/app.lds
@@ -51,7 +51,13 @@ SECTIONS
51 *(.sdata*); 51 *(.sdata*);
52 } > DRAM 52 } > DRAM
53 53
54 .iram X1000_IRAM_BASE: AT (_bssbegin) 54 /*
55 * The following sections are loaded after normal DRAM sections
56 * but are copied elsewhere by the startup code.
57 */
58 _noloaddram = .;
59
60 .iram :
55 { 61 {
56 _iramstart = .; 62 _iramstart = .;
57 . = 0x000; /* TLB refill */ 63 . = 0x000; /* TLB refill */
@@ -68,17 +74,19 @@ SECTIONS
68 *(.irodata); 74 *(.irodata);
69 *(.idata); 75 *(.idata);
70 _iramend = .; 76 _iramend = .;
71 } > IRAM 77 } > IRAM AT> DRAM
72 _iramcopy = LOADADDR(.iram); 78 _iramcopy = LOADADDR(.iram);
73 79
74 .tcsm X1000_TCSM_BASE: AT (_bssbegin + SIZEOF(.iram)) 80 .tcsm :
75 { 81 {
76 _tcsmstart = .; 82 _tcsmstart = .;
77 KEEP(*(.tcsm*)); 83 KEEP(*(.tcsm*));
78 _tcsmend = .; 84 _tcsmend = .;
79 } > TCSM 85 } > TCSM AT> DRAM
80 _tcsmcopy = LOADADDR(.tcsm); 86 _tcsmcopy = LOADADDR(.tcsm);
81 87
88 /* Sections below have no data. */
89
82 . = ALIGN(4); 90 . = ALIGN(4);
83 .stack (NOLOAD) : 91 .stack (NOLOAD) :
84 { 92 {
@@ -91,7 +99,7 @@ SECTIONS
91 _irqstackend = .; 99 _irqstackend = .;
92 } > IRAM 100 } > IRAM
93 101
94 .bss (NOLOAD) : 102 .bss _noloaddram (NOLOAD) :
95 { 103 {
96 _bssbegin = .; 104 _bssbegin = .;
97 *(.sbss*); 105 *(.sbss*);