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-rw-r--r--www/Makefile44
-rw-r--r--www/activity.t12
-rw-r--r--www/cross-gcc.t92
-rw-r--r--www/foot.t4
-rw-r--r--www/head.t25
-rw-r--r--www/lock.t44
-rw-r--r--www/main.t212
-rw-r--r--www/notes.t411
8 files changed, 844 insertions, 0 deletions
diff --git a/www/Makefile b/www/Makefile
new file mode 100644
index 0000000000..9a2e76e095
--- /dev/null
+++ b/www/Makefile
@@ -0,0 +1,44 @@
1ACTION=@echo preprocessing $@; rm -f $@; fcpp -WWW -Uunix -H -C -V -LL >$@
2
3SRC := $(wildcard *.t)
4OBJS := $(SRC:%.t=%.html)
5
6.SUFFIXES: .t .html
7
8%.html : %.t
9 $(ACTION) $<
10
11all: $(OBJS) descramble descramble.static.bz2 sh2d sh2d.static.bz2 \
12 scramble scramble.static.bz2
13 @(cd schematics; $(MAKE))
14 @(cd docs; $(MAKE))
15 @(cd mods; $(MAKE))
16
17main.html: main.t activity.html
18
19descramble: descramble.c
20 cc -Wall -ansi -O2 -s -o $@ $<
21 chmod a+r descramble
22
23descramble.static.bz2: descramble.c
24 cc -static -O2 -s -o descramble.static $<
25 bzip2 -f descramble.static
26 chmod a+r descramble.static.bz2
27
28scramble: scramble.c
29 cc -Wall -ansi -O2 -s -o $@ $<
30 chmod a+r scramble
31
32scramble.static.bz2: scramble.c
33 cc -static -O2 -s -o scramble.static $<
34 bzip2 -f scramble.static
35 chmod a+r scramble.static.bz2
36
37sh2d: sh2d.c
38 cc -O2 -s -o $@ $<
39 chmod a+r sh2d
40
41sh2d.static.bz2: sh2d.c
42 cc -static -O2 -s -o sh2d.static $<
43 bzip2 -f sh2d.static
44 chmod a+r sh2d.static.bz2
diff --git a/www/activity.t b/www/activity.t
new file mode 100644
index 0000000000..eabd0be18b
--- /dev/null
+++ b/www/activity.t
@@ -0,0 +1,12 @@
1#define STATUS(_a_,_b_,_c_) \
2<tr><td bgcolor="#dddddd">_a_</td><td bgcolor="#eeeeee">_b_</td><td bgcolor="#dddddd">_c_</td></tr>
3
4<table>
5<tr bgcolor="#cccccc"><th>Person</th><th>Activity</th><th>Current status</th></tr><tr>
6STATUS(Björn,I2C driver and MAS serial port,Idle - trying to repair his Archos...)
7STATUS(Linus,Serial port GDB stub to bring remote debugging to the archos,Works well; some details left)
8STATUS(Alan,FAT-32 file system and handling,Can create files. Not safe yet ;->)
9STATUS(Daniel,GUI simulator for X11,Partly working)
10STATUS(Rob,Assembling a FAQ,Just began)
11</tr></table>
12<i><small>Updated __DATE__</small></i>
diff --git a/www/cross-gcc.t b/www/cross-gcc.t
new file mode 100644
index 0000000000..8e6b72a66c
--- /dev/null
+++ b/www/cross-gcc.t
@@ -0,0 +1,92 @@
1#define _PAGE_ Building the SH1 cross compiler
2#include "head.t"
3
4<p>
5In this example I will assume that you are running Linux with the bash shell.
6We will only build the C compiler along with the assembler, linker and stuff.
7<h2>Download the source code</h2>
8<p>
9You will need the following archives:
10<ul>
11<li>binutils-2.11.tar.gz (find it at your closest GNU FTP site)
12<li>gcc-3.0.3.tar.gz (find it at your closest GNU FTP site)
13<li>newlib-1.10.0.tar.gz (go to <a href="http://sources.redhat.com/newlib/">the newlib home page</a> for information)
14<li>(optional) gdb-5.1.1.tar.gz (find it at your closest GNU FTP site)
15</ul>
16<h2>Unpack the archives</h2>
17<p>
18<pre>
19 /home/linus> tar zxf binutils-2.11.tar.gz
20 /home/linus> tar zxf gcc-3.0.3.tar.gz
21 /home/linus> tar zxf newlib-1.10.0.tar.gz
22 /home/linus> tar zxf gdb-5.1.1.tar.gz
23</pre>
24<h2>Create the directory tree</h2>
25<p>
26<pre>
27 /home/linus> mkdir build
28 /home/linus> cd build
29 /home/linus/build> mkdir binutils
30 /home/linus/build> mkdir gcc
31 /home/linus/build> mkdir gdb
32</pre>
33<h2>Create the newlib and libgloss links</h2>
34<p>
35The GCC configuration script finds the newlib and libgloss files if they are in the GCC tree. Let's create two soft links.
36<pre>
37 /home/linus> cd gcc-3.0.3
38 /home/linus/gcc-3.0.3> ln -s ../newlib-1.10.0/newlib .
39 /home/linus/gcc-3.0.3> ln -s ../newlib-1.10.0/libgloss .
40</pre>
41<h2>Make up your mind</h2>
42<p>
43Now is the time to decide where you want the tools to be installed. This is
44the directory where all binaries, libraries, man pages and stuff end up when
45you do "make install".
46<p>
47In this example I have chosen "/home/linus/sh1" as my installation directory, or <i>prefix</i> as it is called. Feel free to use any prefix, like
48/usr/local/sh1 for example.
49<h2>Build binutils</h2>
50<p>
51We will start with building the binutils (the assembler, linker and stuff).
52This is pretty straightforward. We will be installing the whole tool chain
53in the /home/linus/sh1 directory.
54<pre>
55 /home/linus> cd build/binutils
56 /home/linus/build/binutils> ../../binutils-2.11/configure --target=sh-elf --prefix=/home/linus/sh1
57 /home/linus/build/binutils> make
58 /home/linus/build/binutils> make install
59</pre>
60<h2>Build GCC</h2>
61<p>
62Now you are ready to build GCC. To do this, you must have the newly built
63binutils in the PATH.
64<pre>
65 /home/linus> export PATH=/home/linus/sh1/bin:$PATH
66 /home/linus> cd build/gcc
67 /home/linus/gcc> ../../gcc-3.0.3/configure --target=sh-elf --prefix=/home/linus/sh1 --with-newlib --enable-languages=c
68 /home/linus/build/binutils> make
69 /home/linus/build/binutils> make install
70</pre>
71<h2>Build GDB</h2>
72<p>
73If you are planning to debug your code with GDB, you have to build it as well.
74<pre>
75 /home/linus> export PATH=/home/linus/sh1/bin:$PATH
76 /home/linus> cd build/gdb
77 /home/linus/gdb> ../../gdb-5.1.1/configure --target=sh-elf --prefix=/home/linus/sh1
78 /home/linus/build/binutils> make
79 /home/linus/build/binutils> make install
80</pre>
81<h2>Done</h2>
82<p>
83If someone up there likes you, you now have a working tool chain for SH1.
84To compile a file with gcc:
85<pre>
86 /home/linus> sh-elf-gcc -c main.o main.c
87</pre>
88Good luck!
89<p>
90<i>Linus</i>
91
92#include "foot.t"
diff --git a/www/foot.t b/www/foot.t
new file mode 100644
index 0000000000..459aa2d339
--- /dev/null
+++ b/www/foot.t
@@ -0,0 +1,4 @@
1<hr size=1 align="left" width="10%">
2<small><i>Page was last modified __DATE__</i> <a href=mailto:bjorn@haxx.se>Björn Stenberg</a></small>
3</body>
4</html>
diff --git a/www/head.t b/www/head.t
new file mode 100644
index 0000000000..a0fab05043
--- /dev/null
+++ b/www/head.t
@@ -0,0 +1,25 @@
1#define BGCOLOR "#99ccff"
2#define TITLE(_x) <h1>_x</h1>
3
4<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
5<html>
6<head>
7#ifdef _PAGE_
8<title>Rockbox - _PAGE_</title>
9#else
10<title>Rockbox</title>
11#endif
12<meta name="author" content="Björn Stenberg, in Emacs">
13#ifndef _PAGE_
14<meta name="keywords" content="bjorn,stenberg,computer,programming,mtb,stockholm,software,sms,byta,bostad">
15#endif
16</head>
17<body bgcolor=BGCOLOR text="black" link="blue" vlink="purple" alink="red">
18#ifdef _LOGO_
19_LOGO_
20#else
21<a href="/rockbox/"><img align="right" src="/rockbox/rockbox100.png" width=99 height=30></a>
22
23TITLE(_PAGE_)
24#endif
25
diff --git a/www/lock.t b/www/lock.t
new file mode 100644
index 0000000000..0e6944f2b8
--- /dev/null
+++ b/www/lock.t
@@ -0,0 +1,44 @@
1#define _PAGE_ Unlocking a password protected harddisk
2#include "head.t"
3
4<p>During development of the Rockbox firmware, on several occations the harddisk has become locked, i.e. password protected. This results in the Archos displaying:
5<pre>
6Part. Error
7Pls Chck HD
8</pre>
9
10<p>We are still not 100% sure why it happens. Theories range from
11low-power conditions to accidental chip select failure.
12It has also happened for normal users,
13using the standard Archos-supplied firmware, although it's more frequent for
14us developers.
15
16<p>We do however know how to unlock the disk:
17
18<h2>Windows/DOS unlock</h2>
19
20<p>Note: This requires taking the Archos apart, which will void your warranty!
21
22<ol>
23<li>Grab
24<a href="http://www.upsystems.com.ua/support/alexmina/atapwd.zip">atapwd</a>
25(written by
26<a href="http://www.upsystems.com.ua/support/alexmina/">Alex Mina</a>)
27<li>Create a bootable DOS floppy disk, and put atapwd.exe on it
28<li>Remove the harddisk from your Archos and plug it into a laptop (or a standard PC, using a 3.5" =&gt; 2.5" IDE adapter)
29<li>Boot from the floppy and run atapwd.exe
30<li>Select the locked harddrive and press enter for the menu
31<li>For Fujitsu disks: Choose "unlock with user password", then "disable with user password". The password is empty, so just press enter at the prompt.
32<li>For Toshiba disks, if the above doesn't work: Choose "unlock with master password", then "disable with master password". The password is all spaces.
33<li>Your disk is now unlocked. Shut down the computer and remove the disk.
34</ol>
35
36<p>Big thanks to Magnus Andersson for discovering the Fujitsu (lack of) user password!
37
38<h2>Linux unlock</h2>
39
40<p>For those of us using Linux, we have written
41<a href="mail/rockbox-archive-2002-03/att-0010/01-isd200.diff">an isd200 driver patch for unlocking the disk</a>.
42This modified driver will automatically unlock the disk when you connect your Archos via USB, so you don't have to do anything special. Apply the patch to a 2.4.18 linux kernel tree.
43
44#include "foot.t"
diff --git a/www/main.t b/www/main.t
new file mode 100644
index 0000000000..c082692db2
--- /dev/null
+++ b/www/main.t
@@ -0,0 +1,212 @@
1#define _LOGO_ <img src="rockbox400.png" width=400 height=123>
2#define _PAGE_ Open Source Jukebox Firmware
3#include "head.t"
4
5<p><small><a href="notes.html">research notes</a> &middot;
6<a href="docs/">data sheets</a> &middot;
7<a href="schematics/">schematics</a> &middot;
8<a href="mods/">hardware mods</a> &middot;
9<a href="http://bjorn.haxx.se/rockbox/mail.cgi">mail list archive</a> &middot;
10<a href="#descrambler">descrambler</a> &middot;
11<a href="#sh2d">sh2d disassembler</a> &middot;
12<a href="/isd200/archos.html">archos internals</a> &middot;
13<a href="http://sourceforge.net/projects/rockbox/">sourceforge project</a>
14</small>
15
16<h2>Purpose</h2>
17
18<p>The purpose of this project is to write an Open Source replacement
19firmware for the Archos Jukebox <i>6000</i>, <i>Studio</i> and <i>Recorder</i> MP3 players.
20
21<p>The main emphasis and first target is the Jukebox 6000.
22
23#if 0
24<h2>Warning</h2>
25<p>All firmware mods on this page are still <i><b>highly experimental</b></i>.
26Try them on your own risk. If you are not 100% sure of what you are doing, keep cool.
27#endif
28
29<h2>Activity</h2>
30
31#include "activity.html"
32
33<h2>News</h2>
34
35<p><i>2002-03-25</i>: New section for
36<a href="mods/">hardware modifications</a>.
37First out is the long awaited
38<a href="mods/serialport.html">serial port mod</a>.
39
40<p><i>2002-03-25</i>: New instructions for
41<a href="cross-gcc.html">how to build an SH-1 cross-compiler</a>.
42
43<p><i>2002-03-14</i>: New linux patch and instructions for
44<a href="lock.html">unlocking the archos harddisk</a> if you have the "Part. Error" problem.
45
46<p><i>2002-03-08</i>: Uploaded a simple example, showing
47<a href="example/">how to build a program for the Archos</a>.
48
49<p><i>2002-03-05</i>: The
50<a href="lock.html">harddisk password lock problem is solved</a>!
51Development can now resume at full speed!
52
53<p><i>2002-01-29</i>: If you have feature requests or suggestions,
54please submit them to our
55<a href="http://sourceforge.net/projects/rockbox/">Sourceforge page</a>.
56
57<p><i>2002-01-19</i>: Cool logo submitted by Thomas Saeys.
58
59<p><i>2002-01-16</i>: The project now has a proper name: Rockbox.
60Logos are welcome! :-)
61<br>Also, Felix Arends wrote a quick <a href="sh-win/">tutorial</a>
62for how to get sh-gcc running under windows.
63
64<p><i>2002-01-09</i>: Nicolas Sauzede
65<a href="mail/rockbox-archive-2002-01/0096.shtml">found out</a>
66how to
67<a href="mail/rockbox-archive-2002-01/0099.shtml">display icons and custom characters</a> on the Jukebox LCD.
68
69<p><i>2002-01-08</i>: The two LCD charsets have been
70<a href="notes.html#charsets">mapped and drawn</a>.
71
72<p><i>2002-01-07</i>:
73<a href="mail/rockbox-archive-2002-01/0026.shtml">Jukebox LCD code</a>.
74I have written a small test program that scrolls some text on the display.
75You need
76<a href="mail/rockbox-archive-2002-01/att-0026/01-archos.mod.gz">this file</a>
77for units with ROM earlier than 4.50 and
78<a href="mail/rockbox-archive-2002-01/att-0050/02-archos.mod.gz">this file</a>
79for all others. (The files are gzipped, you need to unzip them before they will work.)
80
81<p><i>2001-12-29</i>: Recorder LCD code. Gary Czvitkovicz knew the Recorder LCD controller since before and wrote some
82<a href="mail/rockbox-archive-2001-12/att-0145/01-ajbr_lcd.zip">code</a>
83that writes text on the Recorder screen.
84
85<p><i>2001-12-13</i>: First program
86<a href="mail/rockbox-archive-2001-12/0070.shtml">released</a>!
87A 550 bytes long
88<a href="mail/rockbox-archive-2001-12/att-0070/01-archos.mod">archos.mod</a>
89that performs the amazing magic of flashing the red LED. :-)
90
91<p><i>2001-12-11</i>: Checksum algorithm solved, thanks to Andy Choi. A new "scramble" utility is available.
92
93<p><i>2001-12-09</i>: Working my way through the setup code. The <a href="notes.html">notes</a> are being updated continously.
94
95<p><i>2001-12-08</i>: Analyzed the exception vector table. See <a href="notes.html">the notes</a>. Also, a <a href="mail.cgi">mailing list archive</a> is up.
96
97<p><i>2001-12-07</i>:
98 I just wrote this web page to announce descramble.c.
99I've disassembled one firmware version and looked a bit on the code, but no real analysis yet.
100Summary: Lots of dreams, very little reality. :-)
101
102<p>I've set up a mailing list: rockbox@cool.haxx.se.
103To subscribe, send a message to <a href="mailto:majordomo@cool.haxx.se">majordomo@cool.haxx.se</a> with the words "subscribe rockbox" in the body.
104
105
106<h2>About the hardware</h2>
107
108<p>I wrote a <a href="/isd200/archos.html">"dissection" page</a> some months ago,
109showing the inside of the Archos and listing the main components.
110I have also collected a couple of <a href="docs/">data sheets</a>.
111
112<h2>About the software</h2>
113
114<p>The player has one version of the firmware burnt into flash ROM.
115The first thing this version does after boot is to look for a file called
116"archos.mod" in the root directory of the harddisk.
117If it exists, it is loaded into RAM and started.
118This is how firmware upgrades are loaded.
119
120<h3>File format</h3>
121<p>The archos.mod file is scrambled, but luckily not using encryption.
122
123<p>Each data byte is inverted and ROLed 1 bit.
124The data is then spread over four memory segments. The two least significant bits of the address is used as segment number and the rest as offset in the segment. So, basically:
125
126<ul>
127<li>segment number = address % 4
128<li>segment offset = address / 4
129<li>segment length = imgsize / 4
130</ul>
131
132<p>A 6-byte header is added to the beginning of the scrambled image:
133<ul>
134<li>32 bit length (big-endian)
135<li>16 bit checksum
136</ul>
137
138<a name="descrambler">
139<p>I've written a small utility to descramble firmware files:
140<ul>
141<li><a href="descramble.c">descramble.c</a> - 1835 bytes - The source code (pure ANSI C, should work everywhere). GPL licensed.
142<li><a href="descramble">descramble</a> - 4280 bytes - Dynamically linked i386 linux executable
143<li><a href="descramble.static.bz2">descramble.static.bz2</a> - 176015 bytes - bzip2 compressed statically linked i386 linux executable
144<li><a href="descramble.exe">descramble.exe</a> - 45056 bytes - win32 executable
145</ul>
146
147<a name="scrambler">
148<p>...and one to scramble files:
149<ul>
150<li><a href="scramble.c">scramble.c</a> - 2242 bytes - The source code (pure ANSI C, should work everywhere). GPL licensed.
151<li><a href="scramble">scramble</a> - 4376 bytes - Dynamically linked i386 linux executable
152<li><a href="scramble.static.bz2">scramble.static.bz2</a> - 176117 bytes - bzip2 compressed statically linked i386 linux executable
153<li><a href="scramble.exe">scramble.exe</a> - 93385 bytes - win32 executable
154</ul>
155
156<h2>So?</h2>
157
158<p>We now have the possiblity to actually research how the Archos works
159and create our own software for it.
160There is of course a long way still to go before we can start playing
161around with fancy mp3 features.
162
163<a name="sh2d">
164<h3>Disassembler</h3>
165
166<p>I found a nice public domain SH-1/SH-2 disassembler written by Bart Trzynadlowski, called <a href="http://saturndev.emuvibes.com/Files/sh2d020.zip">sh2d</a>:
167<p><b>Update:</b> I've added address lookup and register name translation to the disassembler (2001-12-09)
168<ul>
169<li><a href="sh2d.c">sh2d.c</a> - 28 kB - Source code
170<li><a href="sh2d">sh2d</a> - 15 kB - Dynamically linked i386 linux executable
171<li><a href="sh2d.static.bz2">sh2d.static.bz2</a> - 170 kB - bzip2 compressed statically linked i386 linux executable
172<li><a href="sh2d.exe">sh2d.exe</a> - 40 kB - win32 executable (original version; no lookup)
173</ul>
174
175<h3>Compiler</h3>
176
177<p>GCC supports the SH processor. Just
178<a href="cross-gcc.html">cook yourself a cross-compiler</a>
179(sh-elf-gcc) and voila, instant SH-1 code.
180
181<p>There are also
182<a href="http://www.sh-linux.org/rpm/RPMS/i386/RedHat7.1/">
183pre-cooked RH7.1 RPMs</a> available from sh-linux.org
184
185<h2>Dreams</h2>
186<p>Ok, forget about reality, what could we do with this?
187
188<ul>
189<li>All those simple mp3-play features we sometimes miss:
190 <ul>
191 <li>No pause between songs
192 <li>Mid-song resume
193 <li>Mid-playlist resume
194 <li>No-scan playlists
195 <li>Unlimited playlist size
196 <li>Autobuild playlists (such as "all songs in this directory tree")
197 <li>Auto-continue play in the next directory
198 <li>Current folder and all sub-folder random play
199 <li>Full disk random play
200 <li>REAL random (if press back it goes to the previous song that was played)
201 <li>Multi song queue (folder queue)
202</ul>
203<li>Faster scroll speed
204<li>Archos Recorder support. Most of the hardware is the same, but the display and some other things differ.
205<li>All kinds of cool features done from the wire remote control, including controlling your Archos from your car radio (req hw mod)
206<li>Ogg Vorbis support [unverified: the MAS is somewhat programmable, but enough?]
207<li>Support for megabass switch (req hw mod) [unverified: I just saw the DAC docs shows how to do it switchable. we need a free port pin to be able to switch]
208<li>Player control via USB [unverified]
209<li>Memory expansion? [doubtful: the current DRAM chip only has 10 address lines. we'd have to pull off one heck of a hw mod to expand that]
210</ul>
211
212#include "foot.t"
diff --git a/www/notes.t b/www/notes.t
new file mode 100644
index 0000000000..71e40651d1
--- /dev/null
+++ b/www/notes.t
@@ -0,0 +1,411 @@
1#define _PAGE_ Jukebox notes
2#include "head.t"
3
4<h2>Exception vectors</h2>
5
6<p>The first 0x200 bytes of the image appears to be the exception vector table.
7The vectors are explained on pages 54 and 70-71 in the SH-1 Hardware Manual,
8
9<p>Here's the vector table for v5.03a:
10
11<table border=1><tr>
12<th>Vector</th><th>Address</th><th>Description/interrupt source</th>
13<tr><td> 0</td><td>09000200</td><td>Power-on reset PC</td></tr>
14<tr><td> 1</td><td>0903f2bc</td><td>Power-on reset SP</td></tr>
15<tr><td> 2</td><td>09000200</td><td>Manual reset PC</td></tr>
16<tr><td> 3</td><td>0903f2bc</td><td>Manual reset SP</td></tr>
17<tr><td> 11</td><td>09000cac</td><td>NMI</td></tr>
18<tr><td> 64</td><td>0900c060</td><td>IRQ0</td></tr>
19<tr><td> 70</td><td>09004934</td><td>IRQ6</td></tr>
20<tr><td> 78</td><td>09004a38</td><td>DMAC3 DEI3</td></tr>
21<tr><td> 80</td><td>0900dfd0</td><td>ITU0 IMIA0</td></tr>
22<tr><td> 88</td><td>0900df60</td><td>ITU2 IMIA2</td></tr>
23<tr><td> 90</td><td>0900df60</td><td>ITU2 OVI2</td></tr>
24<tr><td>104</td><td>09004918</td><td>SCI1 ERI1</td></tr>
25<tr><td>105</td><td>090049e0</td><td>SCI1 Rxl1</td></tr>
26<tr><td>109</td><td>09010270</td><td>A/D ITI</td></tr>
27</table>
28
29<p>From the use of address 0x0903f2bc as stack pointer, we can deduce
30that the DRAM is located at address 0x09000000.
31This is backed by the HW manual p102, which says that DRAM can only be at put on CS1, which is either 0x01000000 (8-bit) or 0x09000000 (16-bit).
32
33<p>The vector table also corresponds with the fact that there is code at address 0x200 of the image file. 0x200 is thus the starting point for all code.
34
35<h2>Port pins</h2>
36<p><table><tr valign="top"><td>
37
38<p>Port A pin function configuration summary:
39<table border=1>
40<tr><th>Pin</th><th>Function</th><th>Input/output</th><th>Initial value</th><th>Used for</th></tr>
41<tr><td>PA0</td><td>i/o</td><td>Input</td><td></td><td>DC adapter detect</td></tr>
42<tr><td>PA1</td><td>/RAS</td><td>Output</td><td></td><td>DRAM</td></tr>
43<tr><td>PA2</td><td>/CS6</td><td>Output</td><td></td><td>IDE</td></tr>
44<tr><td>PA3</td><td>/WAIT</td></tr>
45<tr><td>PA4</td><td>/WR</td><td>Output</td><td></td><td>DRAM+Flash</td></tr>
46<tr><td>PA5</td><td>i/o</td><td>Input</td><td></td><td>Key: ON</td></tr>
47<tr><td>PA6</td><td>/RD</td><td>Output</td><td></td><td>IDE</td></tr>
48<tr><td>PA7</td><td>i/o</td><td>Output</td><td>0</td></tr>
49<tr><td>PA8</td><td>i/o</td><td>Output</td><td>0</td></tr>
50<tr><td>PA9</td><td>i/o</td><td>Output</td><td>1</td></tr>
51<tr><td>PA10</td><td>i/o</td><td>Output</td></tr>
52<tr><td>PA11</td><td>i/o</td><td>Input</td><td></td><td>Key: STOP</td></tr>
53<tr><td>PA12</td><td>/IRQ0</td></tr>
54<tr><td>PA13</td><td>i/o</td></tr>
55<tr><td>PA14</td><td>i/o</td></tr>
56<tr><td>PA15</td><td>i/o</td><td>Input</td><td></td><td>USB cable detect</td></tr>
57</table>
58
59</td><td>
60
61<p>Port B pin function configuration summary:
62<table border=1>
63<tr><th>Pin</th><th>Function</th><th>Input/output</th><th>Initial value</th><th>Used for</th></tr>
64<tr><td>PB0</td><td>i/o</td><td>Output</td><td></td><td>LCD</td></tr>
65<tr><td>PB1</td><td>i/o</td><td>Output</td><td></td><td>LCD</td></tr>
66<tr><td>PB2</td><td>i/o</td><td>Output</td><td></td><td>LCD</td></tr>
67<tr><td>PB3</td><td>i/o</td><td>Output</td><td></td><td>LCD</td></tr>
68<tr><td>PB4</td><td>i/o</td><td>Input</td></tr>
69<tr><td>PB5</td><td>i/o</td><td>Output</td><td>1</td><td>I²C data</td></tr>
70<tr><td>PB6</td><td>i/o</td><td>Output</td><td>0</td></tr>
71<tr><td>PB7</td><td>i/o</td><td>Output</td><td></td><td>I²C clock</td></tr>
72<tr><td>PB8</td><td>i/o</td></tr>
73<tr><td>PB9</td><td>TxD0</td><td>Output</td><td></td><td>MPEG</td></tr>
74<tr><td>PB10</td><td>RxD1</td><td>Input</td></td><td></td><td>Remote</td></tr>
75<tr><td>PB11</td><td>TxD1</td><td>Output</td><td></td><td>Remote?</td></tr>
76<tr><td>PB12</td><td>SCK0</td><td>Output</td><td></td><td>MPEG</td></tr>
77<tr><td>PB13</td><td>i/o</td></tr>
78<tr><td>PB14</td><td>/IRQ6</td><td>Input</td></tr>
79<tr><td>PB15</td><td>i/o</td><td>Input</td></tr>
80</table>
81
82
83</td></tr></table>
84
85<p>Port C pin function configuration summary:
86<table border=1>
87<tr><th>Pin</th><th>Function</th><th>Input/output</th><th>Used for</th></tr>
88<tr><td>PC0</td><td>i/o</td><td>Input</td><td>Key: - / PREV</td></tr>
89<tr><td>PC1</td><td>i/o</td><td>Input</td><td>Key: MENU</td></tr>
90<tr><td>PC2</td><td>i/o</td><td>Input</td><td>Key: + / NEXT</td></tr>
91<tr><td>PC3</td><td>i/o</td><td>Input</td><td>Key: PLAY</td></tr>
92<tr><td>PC4</td><td>i/o</td><td>Input</td></tr>
93<tr><td>PC5</td><td>i/o</td><td>Input</td></tr>
94<tr><td>PC6</td><td>i/o</td><td>Input</td></tr>
95<tr><td>PC7</td><td>i/o</td><td>Input</td></tr>
96</table>
97
98
99<h2>Labels</h2>
100<p>Note: Everything is about v5.03a.
101
102<ul>
103<li>0x0200: Start point
104<li>0x383d: Text: "Archos Jukebox hard drive is not bootable! Please insert a bootable floppy and press any key to try again" :-)
105<li>0xc390: Address of "Update" string shown early on LCD.
106<li>0xc8c0: Start of setup code
107<li>0xc8c8: DRAM setup
108<li>0xc4a0: Serial port 1 setup
109<li>0xc40a: Port configuration setup
110<li>0xe3bc: Character set conversion table
111<li>0xfcd0: ITU setup
112<li>0xc52a: Memory area #6 setup
113<li>0x114b0: Start of menu strings
114</ul>
115
116
117<h2>Setup</h2>
118
119<p>The startup code at 0x200 (0x09000200) naturally begins with setting up the system.
120
121<h3>Vector Base Register</h3>
122
123<p>The first thing the code does is setting the VBR, Vector Base Register,
124and thus move the exception vector table from the internal ROM at address 0
125to the DRAM at address 0x09000000:
126
127<pre>
1280x00000200: mov.l @(0x02C,pc),r1 ; 0x0000022C (0x09000000)
1290x00000202: ldc r1,vbr
130</pre>
131
132<h3>Stack</h3>
133
134<p>The next instruction loads r15 with the contents of 0x228, which is 0x0903f2bc. This is the stack pointer, which is used all over the code.
135
136<pre>
1370x00000204: mov.l @(0x024,pc),r15 ; 0x00000228 (0x0903F2BC)
138</pre>
139
140<p>After that the code jumps to the hardware setup at 0xc8c0.
141<pre>
1420x00000206: mov.l @(0x01C,pc),r0 ; 0x00000220 (0x0900C8C0)
1430x00000208: jsr @r0
144</pre>
145
146<h3>DRAM controller</h3>
147
148<p>First up is DRAM setup, at 0xc8c8. It sets the memory controller registers:
149
150<pre>
1510x0000C8C8: mov.l @(0x068,pc),r2 ; 0x0000C930 (0x05FFFFA8)
1520x0000C8CA: mov.w @(0x05A,pc),r1 ; 0x0000C924 (0x1E00)
1530x0000C8CC: mov.l @(0x068,pc),r7 ; 0x0000C934 (0x0F0001C0)
1540x0000C8CE: mov.w r1,@r2 ; 0x1e00 -> DCR
1550x0000C8D0: mov.l @(0x068,pc),r2 ; 0x0000C938 (0x05FFFFAC)
1560x0000C8D2: mov.w @(0x054,pc),r1 ; 0x0000C926 (0x5AB0)
1570x0000C8D4: mov.w r1,@r2 ; 0x5ab0 -> RCR
1580x0000C8D6: mov.l @(0x068,pc),r2 ; 0x0000C93C (0x05FFFFB2)
1590x0000C8D8: mov.w @(0x050,pc),r1 ; 0x0000C928 (0x9605)
1600x0000C8DA: mov.w r1,@r2 ; 0x9505 -> RTCOR
1610x0000C8DC: mov.l @(0x064,pc),r2 ; 0x0000C940 (0x05FFFFAE)
1620x0000C8DE: mov.w @(0x04C,pc),r1 ; 0x0000C92A (0xA518)
1630x0000C8E0: mov.w r1,@r2 ; 0xa518 -> RTCSR
164</pre>
165
166<h3>Serial port 0</h3>
167
168<p>Code starting at 0x483c.
169
170<p>As C code:
171
172<table border><tr><td bgcolor="#a0d6e8">
173<pre>
174void setup_sci0(void)
175{
176 /* set PB12 to output */
177 PBIOR |= 0x1000;
178&nbsp;
179 /* Disable serial port */
180 SCR0 = 0x00;
181&nbsp;
182 /* Syncronous, 8N1, no prescale */
183 SMR0 = 0x80;
184&nbsp;
185 /* Set baudrate 1Mbit/s */
186 BRR0 = 0x03;
187&nbsp;
188 /* use SCK as serial clock output */
189 SCR0 = 0x01;
190&nbsp;
191 /* Clear FER and PER */
192 SSR0 &= 0xe7;
193&nbsp;
194 /* Set interrupt D priority to 0 */
195 IPRD &= 0x0ff0;
196&nbsp;
197 /* set IRQ6 and IRQ7 to edge detect */
198 ICR |= 0x03;
199&nbsp;
200 /* set PB15 and PB14 to inputs */
201 PBIOR &= 0x7fff;
202 PBIOR &= 0xbfff;
203&nbsp;
204 /* set IRQ6 prio 8 and IRQ7 prio 0 */
205 IPRB = ( IPRB & 0xff00 ) | 0x80;
206&nbsp;
207 /* Enable Tx (only!) */
208 SCR0 = 0x20;
209}
210</pre>
211</td></tr></table>
212
213
214<h3>Serial port 1</h3>
215
216<p>Code starting at 0x47a0.
217
218<p>As C code:
219
220<table border><tr><td bgcolor="#a0d6e8">
221<pre>
222&#35;define SYSCLOCK 12000000
223&#35;define PRIORITY 8
224&nbsp;
225void setup_sci1(int baudrate)
226{
227 /* Disable serial port */
228 SCR1 = 0;
229&nbsp;
230 /* Set PB11 to Tx and PB10 to Rx */
231 PBCR1 = (PBCR1 & 0xff0f) | 0xa0;
232&nbsp;
233 /* Asynchronous, 8N1, no prescaler */
234 SMR1 = 0;
235&nbsp;
236 /* Set baudrate */
237 BRR1 = SYSCLOCK / (baudrate * 32) - 1;
238&nbsp;
239 /* Clear FER and PER */
240 SSR1 &= 0xe7;
241&nbsp;
242 /* Set interrupt priority to 8 */
243 IPRE = (IPRE & 0x0fff) | (PRIORITY << 12);
244&nbsp;
245 /* Enable Rx, Tx and Rx interrupt */
246 SCR1 = 0x70;
247}
248</pre>
249</td></tr></table>
250
251<h3>Pin configuration</h3>
252
253<p>Starting at 0xc40a:
254
255<p><tt>CASCR = 0xafff</tt>: Column Address Strobe Pin Control Register. Set bits CASH MD1 and CASL MD1.
256
257<h4>Port A</h4>
258<br><tt>PACR1 = 0x0102</tt>: Set pin functions
259<br><tt>PACR2 = 0xbb98</tt>: Set pin functions
260<br><tt>PAIOR &= 0xfffe</tt>: PA0 is input
261<br><tt>PAIOR &= 0xffdf</tt>: PA5 is input
262<br><tt>PADR &= 0xff7f</tt>: Set pin PA7 low
263<br><tt>PAIOR |= 0x80</tt>: PA7 is output
264<br><tt>PAIOR |= 0x100</tt>: PA8 is output
265<br><tt>PADR |= 0x200</tt>: Set pin PA9 high
266<br><tt>PAIOR |= 0x200</tt>: PA9 is output
267<br><tt>PAIOR |= 0x400</tt>: PA10 is output
268<br><tt>PAIOR &= 0xf7ff</tt>: PA11 is input
269<br><tt>PAIOR &= 0xbfff</tt>: PA14 is input
270<br><tt>PAIOR = 0x7fff</tt>: PA15 is input
271<br><tt>PADR &= 0xfeff</tt>: Set pin PA8 low
272
273<h4>Port B</h4>
274<br><tt>PBCR1 = 0x12a8</tt>: Set pin functions
275<br><tt>PBCR2 = 0x0000</tt>: Set pin functions
276<br><tt>PBDR &= 0xffef</tt>: Set pin PB4 low
277<br><tt>PBIOR &= 0xffef</tt>: PB4 is input
278<br><tt>PBIOR |= 0x20</tt>: PB5 is output
279<br><tt>PBIOR |= 0x40</tt>: PA6 is output
280<br><tt>PBDR &= 0xffbf</tt>: Set pin PB6 low
281<br><tt>PBDR |= 0x20</tt>: Set pin PB5 high
282
283<h3>ITU (Integrated Timer Pulse Unit)</h3>
284
285<p>Starting at 0xfcd0:
286
287<p><tt>TSNC &= 0xfe</tt>: The timer counter for channel 0 (TCNT0) operates independently of other channels
288<br><tt>TMDR &= 0xfe</tt>: Channel 0 operates in normal (not PWM) mode
289<br><tt>GRA0 = 0x1d4c</tt>:
290<br><tt>TCR0 &= 0x67; TCR0 |= 0x23</tt>: TCNT is cleared by general register A (GRA) compare match or input capture. Counter clock = f/8
291<br><tt>TIOR0 = 0x88</tt>: Compare disabled
292<br><tt>TIER0 = 0xf9</tt>: Enable interrupt requests by IMFA (IMIA)
293<br><tt>IPRC &= 0xff0f; IPRC |= 0x30</tt>: Set ITU0 interrupt priority level 3.
294<br><tt>TSTR |= 0x01</tt>: Start TCNT0
295
296<h3>Memory area #6 ?</h3>
297
298<p>From 0xc52a:
299
300<p><tt>PADR |= 0x0200</tt>: Set PA13 high
301<br><tt>WCR1 = 0x40ff</tt>: Enable /WAIT support for memory area 6. Hmmm, what's on CS6?
302<br><tt>WCR1 &= 0xfdfd</tt>: Turn off RW5 (was off already) and WW1 (enable short address output cycle).
303<br><tt>WCR3 &= 0xe7ff</tt>: Turn off A6LW1 and A6LW0; 1 wait state for CS6.
304<br><tt>ICR |= 0x80</tt>: Interrupt is requested on falling edge of IRQ0 input
305
306<h2>Remote control</h2>
307<p>Tjerk Schuringa reports:
308"Finally got that extra bit going on my bitpattern generator. So far I fed only
309simple characters to my jukebox, and this is the result:
310
311<pre>
312START D0 1 2 3 4 5 6 7 STOP FUNCTION
3130 0 0 0 0 0 1 1 1 1 VOL- (the one I got already)
314 0 0 0 0 1 0 1 1 VOL+ (figures)
315 0 0 0 1 0 0 1 1 +
316 0 0 1 0 0 0 1 1 -
317 0 1 0 0 0 0 1 1 STOP
318 1 0 0 0 0 0 1 1 PLAY
319</pre>
320
321<p>I also found that "repeat" functions (keep a button depressed) needs to be
322faster than 0.5 s. If it is around 1 second or more it is interpreted as a
323seperate keypress. So far I did not get the "fast forward" function because the
324fastest I can get is 0.5 s.
325
326<p>Very important: the baudrate is indeed 9600 baud! These pulses are fed to the
327second ring on the headphone jack, and (if I understood correctly) go to RxD1
328of the SH1."
329
330<h2>LCD display</h2>
331
332<p>The Recorder uses a Shing Yih Technology G112064-30 graphic LCD display with 112x64 pixels. The controller is a Solomon SSD1815Z.
333
334<p>It's not yet known what display/controller the Jukebox has, but I'd be surprised if it doesn't use a similar controller.
335
336<p>Starting at 0xE050, the code flicks PB2 and PB3 a great deal and then some with PB1 and PB0. Which gives us the following connections:
337
338<table border><tr><th>CPU pin</th><th>LCD pin</th></tr>
339<tr><td>PB0</td><td>DC</td></tr>
340<tr><td>PB1</td><td>CS1</td></tr>
341<tr><td>PB2</td><td>SCK</td></tr>
342<tr><td>PB3</td><td>SDA</td></tr>
343</table>
344
345<p>The Recorder apparently has the connections this way (according to Gary Czvitkovicz):
346<table border><tr><th>CPU pin</th><th>LCD pin</th></tr>
347<tr><td>PB0</td><td>SDA</td></tr>
348<tr><td>PB1</td><td>SCK</td></tr>
349<tr><td>PB2</td><td>DC</td></tr>
350<tr><td>PB3</td><td>CS1</td></tr>
351</table>
352
353<a name="charsets"><p>The charsets:
354
355<p><table border=0><tr>
356<td><img src="codes_old.png" width=272 height=272><br>
357<small>Old LCD charset (before v4.50)</small></td>
358<td><img src="codes_new.png" width=272 height=272><br>
359<small>New LCD charset (after v4.50)</small></td></tr></table>
360
361
362<h3>Code</h3>
363
364<p>This C snippet write a byte to the Jukebox LCD controller.
365The 'data' flag inticates if the byte is a command byte or a data byte.
366
367<table border><tr><td bgcolor="#a0d6e8">
368<pre>
369&#35;define DC 1
370&#35;define CS1 2
371&#35;define SDA 4
372&#35;define SCK 8
373&nbsp;
374void lcd_write(int byte, int data)
375{
376 int i;
377 char on,off;
378&nbsp;
379 PBDR &= ~CS1; /* enable lcd chip select */
380&nbsp;
381 if ( data ) {
382 on=~(SDA|SCK);
383 off=SCK|DC;
384 }
385 else {
386 on=~(SDA|SCK|DC);
387 off=SCK;
388 }
389 /* clock out each bit, MSB first */
390 for (i=0x80;i;i>>=1)
391 {
392 PBDR &= on;
393 if (i & byte)
394 PBDR |= SDA;
395 PBDR |= off;
396 }
397&nbsp;
398 PBDR |= CS1; /* disable lcd chip select */
399}
400</pre>
401</td></tr></table>
402
403<h2>Firmware size</h2>
404
405<p>Joachim Schiffer found out that firmware files have to be at least 51200
406bytes to be loaded by newer firmware ROMs.
407So my "first program" only works on players with older firmware in ROM
408(my has 3.18). Joachim posted a
409<a href="mail/jukebox-archive-2001-12/att-0087/01-AJBREC.ajz">padded version</a> that works everywhere.
410
411#include "foot.t"
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