diff options
-rw-r--r-- | bootloader/gigabeat-s.c | 9 | ||||
-rwxr-xr-x | firmware/export/imx31l.h | 11 | ||||
-rw-r--r-- | firmware/target/arm/imx31/app.lds | 3 | ||||
-rw-r--r-- | firmware/target/arm/imx31/boot.lds | 5 | ||||
-rw-r--r-- | firmware/target/arm/imx31/crt0.S | 25 | ||||
-rw-r--r-- | firmware/target/arm/imx31/gigabeat-s/lcd-imx31.c | 10 |
6 files changed, 36 insertions, 27 deletions
diff --git a/bootloader/gigabeat-s.c b/bootloader/gigabeat-s.c index 57eb18ec56..cd3b1df545 100644 --- a/bootloader/gigabeat-s.c +++ b/bootloader/gigabeat-s.c | |||
@@ -334,14 +334,17 @@ void main(void) | |||
334 | /* Flush and invalidate all caches (because vectors were written) */ | 334 | /* Flush and invalidate all caches (because vectors were written) */ |
335 | invalidate_icache(); | 335 | invalidate_icache(); |
336 | 336 | ||
337 | lcd_clear_display(); | ||
338 | printf("Gigabeat S Rockbox Bootloader"); | ||
339 | printf("Version %s", version); | ||
340 | system_init(); | 337 | system_init(); |
341 | kernel_init(); | 338 | kernel_init(); |
342 | 339 | ||
343 | enable_interrupt(IRQ_FIQ_STATUS); | 340 | enable_interrupt(IRQ_FIQ_STATUS); |
344 | 341 | ||
342 | lcd_init_device(); | ||
343 | lcd_clear_display(); | ||
344 | |||
345 | printf("Gigabeat S Rockbox Bootloader"); | ||
346 | printf("Version %s", version); | ||
347 | |||
345 | /* Initialize KPP so we can poll the button states */ | 348 | /* Initialize KPP so we can poll the button states */ |
346 | button_init_device(); | 349 | button_init_device(); |
347 | 350 | ||
diff --git a/firmware/export/imx31l.h b/firmware/export/imx31l.h index c9ef446e90..e31f30f1b0 100755 --- a/firmware/export/imx31l.h +++ b/firmware/export/imx31l.h | |||
@@ -28,12 +28,14 @@ | |||
28 | #define REG32_PTR_T volatile unsigned long * | 28 | #define REG32_PTR_T volatile unsigned long * |
29 | 29 | ||
30 | /* Place in the section with the framebuffer */ | 30 | /* Place in the section with the framebuffer */ |
31 | #define TTB_BASE_ADDR (0x80100000 + 0x00100000 - TTB_SIZE) | 31 | #define TTB_BASE_ADDR (CSD0_BASE_ADDR + (MEM*0x100000) - TTB_SIZE) |
32 | #define TTB_SIZE (0x4000) | 32 | #define TTB_SIZE (0x4000) |
33 | #define IRAM_SIZE (0x4000) | 33 | #define IRAM_SIZE (0x4000) |
34 | #define TTB_BASE ((unsigned long *)TTB_BASE_ADDR) | 34 | #define TTB_BASE ((unsigned long *)TTB_BASE_ADDR) |
35 | #define FRAME ((void*)0x03f00000) | ||
36 | #define FRAME_SIZE (240*320*2) | 35 | #define FRAME_SIZE (240*320*2) |
36 | /* Rockbox framebuffer address, not retail OS */ | ||
37 | #define FRAME_PHYS_ADDR (TTB_BASE_ADDR - FRAME_SIZE) | ||
38 | #define FRAME ((void *)(FRAME_PHYS_ADDR-CSD0_BASE_ADDR)) | ||
37 | 39 | ||
38 | #define DEVBSS_ATTR __attribute__((section(".devbss"),nocommon)) | 40 | #define DEVBSS_ATTR __attribute__((section(".devbss"),nocommon)) |
39 | /* USBOTG */ | 41 | /* USBOTG */ |
@@ -411,6 +413,11 @@ | |||
411 | #define IPU_BRK_CTRL_2 (*(REG32_PTR_T)(IPU_CTRL_BASE_ADDR+0x54)) | 413 | #define IPU_BRK_CTRL_2 (*(REG32_PTR_T)(IPU_CTRL_BASE_ADDR+0x54)) |
412 | #define IPU_BRK_STAT (*(REG32_PTR_T)(IPU_CTRL_BASE_ADDR+0x58)) | 414 | #define IPU_BRK_STAT (*(REG32_PTR_T)(IPU_CTRL_BASE_ADDR+0x58)) |
413 | #define IPU_DIAGB_CTRL (*(REG32_PTR_T)(IPU_CTRL_BASE_ADDR+0x60)) | 415 | #define IPU_DIAGB_CTRL (*(REG32_PTR_T)(IPU_CTRL_BASE_ADDR+0x60)) |
416 | #define IPU_IDMAC_CONF (*(REG32_PTR_T)(IPU_CTRL_BASE_ADDR+0xA4)) | ||
417 | #define IPU_IDMAC_CHA_EN (*(REG32_PTR_T)(IPU_CTRL_BASE_ADDR+0xA8)) | ||
418 | #define IPU_IDMAC_CHA_PRI (*(REG32_PTR_T)(IPU_CTRL_BASE_ADDR+0xAC)) | ||
419 | #define IPU_IDMAC_CHA_BUSY (*(REG32_PTR_T)(IPU_CTRL_BASE_ADDR+0xB0)) | ||
420 | |||
414 | 421 | ||
415 | 422 | ||
416 | /* ATA */ | 423 | /* ATA */ |
diff --git a/firmware/target/arm/imx31/app.lds b/firmware/target/arm/imx31/app.lds index 80123fee9d..4ab4665062 100644 --- a/firmware/target/arm/imx31/app.lds +++ b/firmware/target/arm/imx31/app.lds | |||
@@ -34,7 +34,8 @@ STARTUP(target/arm/imx31/crt0.o) | |||
34 | MEMORY | 34 | MEMORY |
35 | { | 35 | { |
36 | DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE | 36 | DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE |
37 | DEVBSS : ORIGIN = 0x80100000 + FRAME_SIZE, LENGTH = 0x100000 - FRAME_SIZE - TTB_SIZE | 37 | DEVBSS : ORIGIN = CSD0_BASE_ADDR + (MEMORYSIZE * 0x100000 - 0x100000), \ |
38 | LENGTH = 0x100000 - FRAME_SIZE - TTB_SIZE | ||
38 | } | 39 | } |
39 | 40 | ||
40 | SECTIONS | 41 | SECTIONS |
diff --git a/firmware/target/arm/imx31/boot.lds b/firmware/target/arm/imx31/boot.lds index a7570c1cf0..b108ba181d 100644 --- a/firmware/target/arm/imx31/boot.lds +++ b/firmware/target/arm/imx31/boot.lds | |||
@@ -8,7 +8,7 @@ STARTUP(target/arm/imx31/crt0.o) | |||
8 | 8 | ||
9 | #define DRAMSIZE (1 << 20) /* Limit 1 MB for bootloader */ | 9 | #define DRAMSIZE (1 << 20) /* Limit 1 MB for bootloader */ |
10 | 10 | ||
11 | #define DRAMORIG (0x02000000-0x00100000) | 11 | #define DRAMORIG 0x02000000 |
12 | /* #define IRAMORIG 0x1FFFC000 */ | 12 | /* #define IRAMORIG 0x1FFFC000 */ |
13 | #define IRAM DRAM | 13 | #define IRAM DRAM |
14 | #define IRAMSIZE IRAM_SIZE | 14 | #define IRAMSIZE IRAM_SIZE |
@@ -19,7 +19,8 @@ STARTUP(target/arm/imx31/crt0.o) | |||
19 | MEMORY | 19 | MEMORY |
20 | { | 20 | { |
21 | DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE | 21 | DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE |
22 | DEVBSS : ORIGIN = 0x80100000 + FRAME_SIZE, LENGTH = 0x100000 - FRAME_SIZE - TTB_SIZE | 22 | DEVBSS : ORIGIN = CSD0_BASE_ADDR + (MEMORYSIZE*0x100000 - 0x100000), \ |
23 | LENGTH = 0x100000 - FRAME_SIZE - TTB_SIZE | ||
23 | } | 24 | } |
24 | 25 | ||
25 | SECTIONS | 26 | SECTIONS |
diff --git a/firmware/target/arm/imx31/crt0.S b/firmware/target/arm/imx31/crt0.S index c3bba824dc..8459753f87 100644 --- a/firmware/target/arm/imx31/crt0.S +++ b/firmware/target/arm/imx31/crt0.S | |||
@@ -57,7 +57,6 @@ start: | |||
57 | newstart: | 57 | newstart: |
58 | msr cpsr_c, #0xd3 /* enter supervisor mode, disable IRQ/FIQ */ | 58 | msr cpsr_c, #0xd3 /* enter supervisor mode, disable IRQ/FIQ */ |
59 | 59 | ||
60 | #ifdef BOOTLOADER | ||
61 | adr r2, remap_start /* Load PC-relative labels */ | 60 | adr r2, remap_start /* Load PC-relative labels */ |
62 | adr r3, remap_end | 61 | adr r3, remap_end |
63 | ldr r5, =TTB_BASE_ADDR /* TTB pointer */ | 62 | ldr r5, =TTB_BASE_ADDR /* TTB pointer */ |
@@ -127,13 +126,6 @@ remap_start: | |||
127 | /*** End of L2 operations ***/ | 126 | /*** End of L2 operations ***/ |
128 | 127 | ||
129 | /* TTB Initialisation */ | 128 | /* TTB Initialisation */ |
130 | mov r2, r5 | ||
131 | add r3, r5, #TTB_SIZE | ||
132 | mov r1, #0 | ||
133 | 1: | ||
134 | str r1, [r2], #4 | ||
135 | cmp r2, r3 | ||
136 | blo 1b | ||
137 | 129 | ||
138 | /* Set TTB base address */ | 130 | /* Set TTB base address */ |
139 | mcr p15, 0, r5, c2, c0, 0 | 131 | mcr p15, 0, r5, c2, c0, 0 |
@@ -157,32 +149,29 @@ remap_start: | |||
157 | add r1, r1, #(1 << 20) /* Next MB */ | 149 | add r1, r1, #(1 << 20) /* Next MB */ |
158 | cmp r2, r3 | 150 | cmp r2, r3 |
159 | blo 1b | 151 | blo 1b |
160 | sub r1, r1, #TTB_SIZE/4*(1 << 20) /* Back up */ | 152 | |
153 | bic r1, r1, #0x0ff00000 /* Back up */ | ||
161 | 154 | ||
162 | /* Map 0x80000000 -> 0x0, cached */ | 155 | /* Map 0x80000000 -> 0x0, cached */ |
163 | mov r2, r5 /* TTB pointer */ | 156 | mov r2, r5 /* TTB pointer */ |
164 | add r3, r5, #63*4 /* End position */ | 157 | add r3, r5, #64*4 /* End position */ |
165 | orr r1, r1, #0x80000000 /* Physical address */ | 158 | orr r1, r1, #0x80000000 /* Physical address */ |
166 | orr r1, r1, #((1 << 3) | /* cache flag */ \ | 159 | orr r1, r1, #((1 << 3) | /* cache flag */ \ |
167 | (1 << 2)) /* buffer flag */ | 160 | (1 << 2)) /* buffer flag */ |
168 | 1: | 161 | 1: |
169 | str r1, [r2], #4 | 162 | str r1, [r2], #4 |
170 | add r1, r1, #(1 << 20) | 163 | add r1, r1, #(1 << 20) |
171 | and r4, r1, #0x0ff00000 | ||
172 | cmp r4, #0x00100000 /* Skip framebuffer */ | ||
173 | addeq r1, r1, #(1 << 20) | ||
174 | cmp r2, r3 | 164 | cmp r2, r3 |
175 | blo 1b | 165 | blo 1b |
176 | 166 | ||
177 | /* Map device section 0x80100000 to 0x03f00000 - buffered, not cached */ | 167 | /* Map device section 0x83f00000 to 0x03f00000 - buffered, not cached */ |
178 | bic r1, r1, #0x0ff00000 | 168 | bic r1, r1, #0x0ff00000 |
179 | orr r1, r1, #0x00100000 | 169 | orr r1, r1, #0x03f00000 |
180 | bic r1, r1, #(1 << 3) | 170 | bic r1, r1, #(1 << 3) |
181 | add r2, r5, #63*4 | 171 | add r2, r5, #63*4 |
182 | str r1, [r2] | 172 | str r1, [r2] |
183 | 173 | ||
184 | /* Enable MMU */ | 174 | /* Enable MMU */ |
185 | |||
186 | mov r0, #0 | 175 | mov r0, #0 |
187 | mcr p15, 0, r0, c8, c7, 0 /* Invalidate TLB */ | 176 | mcr p15, 0, r0, c8, c7, 0 /* Invalidate TLB */ |
188 | mcr p15, 0, r0, c7, c7, 0 /* Invalidate icache and dcache */ | 177 | mcr p15, 0, r0, c7, c7, 0 /* Invalidate icache and dcache */ |
@@ -230,8 +219,6 @@ L_post_remap: | |||
230 | .word remap_end | 219 | .word remap_end |
231 | remap_end: | 220 | remap_end: |
232 | 221 | ||
233 | #endif /* BOOTLOADER */ | ||
234 | |||
235 | #ifdef BOOTLOADER | 222 | #ifdef BOOTLOADER |
236 | /* Copy bootloader exception handler code to address 0 */ | 223 | /* Copy bootloader exception handler code to address 0 */ |
237 | ldr r2, =_vectorsstart | 224 | ldr r2, =_vectorsstart |
diff --git a/firmware/target/arm/imx31/gigabeat-s/lcd-imx31.c b/firmware/target/arm/imx31/gigabeat-s/lcd-imx31.c index eb14152775..c353380221 100644 --- a/firmware/target/arm/imx31/gigabeat-s/lcd-imx31.c +++ b/firmware/target/arm/imx31/gigabeat-s/lcd-imx31.c | |||
@@ -27,6 +27,7 @@ | |||
27 | #include "lcd-target.h" | 27 | #include "lcd-target.h" |
28 | #include "backlight-target.h" | 28 | #include "backlight-target.h" |
29 | 29 | ||
30 | #define MAIN_LCD_IDMAC_CHANNEL 14 | ||
30 | #define LCDADDR(x, y) (&lcd_framebuffer[(y)][(x)]) | 31 | #define LCDADDR(x, y) (&lcd_framebuffer[(y)][(x)]) |
31 | 32 | ||
32 | static volatile bool lcd_on = true; | 33 | static volatile bool lcd_on = true; |
@@ -46,6 +47,15 @@ extern void lcd_copy_buffer_rect(fb_data *dst, const fb_data *src, | |||
46 | /* LCD init */ | 47 | /* LCD init */ |
47 | void lcd_init_device(void) | 48 | void lcd_init_device(void) |
48 | { | 49 | { |
50 | /* Move the framebuffer */ | ||
51 | #ifdef BOOTLOADER | ||
52 | /* Only do this once to avoid flicker */ | ||
53 | memset(FRAME, 0x00, FRAME_SIZE); | ||
54 | #endif | ||
55 | IPU_IDMAC_CHA_EN &= ~(1ul << MAIN_LCD_IDMAC_CHANNEL); | ||
56 | IPU_IMA_ADDR = ((0x1 << 16) | (MAIN_LCD_IDMAC_CHANNEL << 4)) + (1 << 3); | ||
57 | IPU_IMA_DATA = FRAME_PHYS_ADDR; | ||
58 | IPU_IDMAC_CHA_EN |= (1ul << MAIN_LCD_IDMAC_CHANNEL); | ||
49 | } | 59 | } |
50 | 60 | ||
51 | /* Update a fraction of the display. */ | 61 | /* Update a fraction of the display. */ |