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-rw-r--r--firmware/target/arm/as3525/sd-as3525v2.c41
1 files changed, 28 insertions, 13 deletions
diff --git a/firmware/target/arm/as3525/sd-as3525v2.c b/firmware/target/arm/as3525/sd-as3525v2.c
index 8484429e9f..47cc690971 100644
--- a/firmware/target/arm/as3525/sd-as3525v2.c
+++ b/firmware/target/arm/as3525/sd-as3525v2.c
@@ -138,6 +138,20 @@ static void printf(const char *format, ...)
138#define SD_REG(x) (*(volatile unsigned long *) (SD_BASE+x)) 138#define SD_REG(x) (*(volatile unsigned long *) (SD_BASE+x))
139 139
140#define MCI_CTRL SD_REG(0x00) 140#define MCI_CTRL SD_REG(0x00)
141
142#define CTRL_RESET (1<<0)
143#define FIFO_RESET (1<<1)
144#define DMA_RESET (1<<2)
145#define INT_ENABLE (1<<4)
146#define DMA_ENABLE (1<<5)
147#define READ_WAIT (1<<6)
148#define SEND_IRQ_RESP (1<<7)
149#define ABRT_READ_DATA (1<<8)
150#define SEND_CCSD (1<<9)
151#define SEND_AS_CCSD (1<<10)
152#define EN_OD_PULLUP (1<<24)
153
154
141#define MCI_PWREN SD_REG(0x04) /* power enable */ 155#define MCI_PWREN SD_REG(0x04) /* power enable */
142#define MCI_CLKDIV SD_REG(0x08) /* clock divider */ 156#define MCI_CLKDIV SD_REG(0x08) /* clock divider */
143#define MCI_CLKSRC SD_REG(0x0C) /* clock source */ 157#define MCI_CLKSRC SD_REG(0x0C) /* clock source */
@@ -217,7 +231,7 @@ static inline void mci_delay(void) { int i = 0xffff; while(i--) ; }
217 231
218void INT_NAND(void) 232void INT_NAND(void)
219{ 233{
220 MCI_CTRL &= ~0x10; // ? 234 MCI_CTRL &= INT_ENABLE;
221 const int status = MCI_STATUS; 235 const int status = MCI_STATUS;
222 236
223#if 0 237#if 0
@@ -265,7 +279,7 @@ void INT_NAND(void)
265 //while(!button_read_device()); 279 //while(!button_read_device());
266 //while(button_read_device()); 280 //while(button_read_device());
267 281
268 MCI_CTRL |= 0x10; // ? 282 MCI_CTRL |= INT_ENABLE;
269} 283}
270 284
271static bool send_cmd(const int cmd, const int arg, const int flags, 285static bool send_cmd(const int cmd, const int arg, const int flags,
@@ -313,7 +327,7 @@ static bool send_cmd(const int cmd, const int arg, const int flags,
313 MCI_ARGUMENT = arg; 327 MCI_ARGUMENT = arg;
314 MCI_COMMAND = val; 328 MCI_COMMAND = val;
315 329
316 MCI_CTRL |= 0x10; 330 MCI_CTRL |= INT_ENABLE;
317 331
318 max = 1000; 332 max = 1000;
319 while(max-- && MCI_COMMAND & MCI_COMMAND_ACTIVE); /* wait for cmd completion */ 333 while(max-- && MCI_COMMAND & MCI_COMMAND_ACTIVE); /* wait for cmd completion */
@@ -479,22 +493,21 @@ static void init_controller(void)
479 493
480 mci_delay(); 494 mci_delay();
481 495
482 MCI_CTRL |= 1; 496 MCI_CTRL |= CTRL_RESET; /* FIXME: FIFO & DMA reset? */
483 int max = 1000; 497 while(MCI_CTRL & CTRL_RESET)
484 while(max-- && !(MCI_CTRL & 1))
485 ; 498 ;
486 499
487 MCI_RAW_STATUS = 0xffffffff; 500 MCI_RAW_STATUS = 0xffffffff;
488 MCI_MASK = 0xffffbffe; 501 MCI_MASK = 0xffffbffe;
489 502
490 MCI_CTRL |= 0x10; 503 MCI_CTRL |= INT_ENABLE;
491 MCI_TMOUT = 0xffffffff; 504 MCI_TMOUT = 0xffffffff;
492 505
493 MCI_CLKENA = (1<<shift) - 1; 506 MCI_CLKENA = (1<<shift) - 1;
494 507
495 MCI_ARGUMENT = 0; 508 MCI_ARGUMENT = 0;
496 MCI_COMMAND = 0x80202000; 509 MCI_COMMAND = 0x80202000;
497 max = 10; 510 int max = 10;
498 while(max-- && (MCI_COMMAND & (1<<31))) ; 511 while(max-- && (MCI_COMMAND & (1<<31))) ;
499 512
500 MCI_DEBNCE = 0xfffff; 513 MCI_DEBNCE = 0xfffff;
@@ -654,18 +667,20 @@ static int sd_transfer_sectors(unsigned long start, int count, void* buf, bool w
654 write ? SD_WRITE_MULTIPLE_BLOCK : SD_READ_MULTIPLE_BLOCK; 667 write ? SD_WRITE_MULTIPLE_BLOCK : SD_READ_MULTIPLE_BLOCK;
655 668
656 669
657 MCI_CTRL |= 2; 670 MCI_CTRL |= FIFO_RESET;
658 while(MCI_CTRL & 2) ; 671 while(MCI_CTRL & FIFO_RESET)
672 ;
659 673
660 //MCI_BLKSIZ = 512; 674 //MCI_BLKSIZ = 512;
661 MCI_BYTCNT = transfer * 512; 675 MCI_BYTCNT = transfer * 512;
662 676
663 MCI_CTRL |= 2; 677 MCI_CTRL |= FIFO_RESET;
664 while(MCI_CTRL & 2) ; 678 while(MCI_CTRL & FIFO_RESET)
679 ;
665 680
666 MCI_FIFOTH &= ~0x7fff0fff; 681 MCI_FIFOTH &= ~0x7fff0fff;
667 682
668 MCI_CTRL |= 0x20; 683 MCI_CTRL |= DMA_ENABLE;
669 MCI_MASK = 0xBE8C; 684 MCI_MASK = 0xBE8C;
670 MCI_FIFOTH |= 0x503f0080; 685 MCI_FIFOTH |= 0x503f0080;
671 686