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-rw-r--r--firmware/export/config/ipod6g.h5
-rw-r--r--firmware/export/s5l8702.h20
-rw-r--r--firmware/target/arm/s5l8702/ipod6g/cscodec-ipod6g.c8
-rw-r--r--firmware/target/arm/s5l8702/ipod6g/pmu-ipod6g.c1
-rw-r--r--firmware/target/arm/s5l8702/system-s5l8702.c7
-rw-r--r--firmware/target/arm/s5l8702/system-target.h5
6 files changed, 30 insertions, 16 deletions
diff --git a/firmware/export/config/ipod6g.h b/firmware/export/config/ipod6g.h
index 16cf9afcef..6ab89e5869 100644
--- a/firmware/export/config/ipod6g.h
+++ b/firmware/export/config/ipod6g.h
@@ -168,10 +168,9 @@
168#define HAVE_USB_CHARGING_ENABLE 168#define HAVE_USB_CHARGING_ENABLE
169 169
170/* The size of the flash ROM */ 170/* The size of the flash ROM */
171#define FLASH_SIZE 0x400000 171#define FLASH_SIZE 0x1000000
172 172
173/* Define this to the CPU frequency */ 173/* Define this to the CPU frequency */
174//TODO: Figure out exact value
175#define CPU_FREQ 216000000 174#define CPU_FREQ 216000000
176 175
177/* define this if the hardware can be powered off while charging */ 176/* define this if the hardware can be powered off while charging */
@@ -195,7 +194,7 @@
195#define MAX_PHYS_SECTOR_SIZE 4096 194#define MAX_PHYS_SECTOR_SIZE 4096
196 195
197/* Define this if you have adjustable CPU frequency */ 196/* Define this if you have adjustable CPU frequency */
198//TODO: #define HAVE_ADJUSTABLE_CPU_FREQ 197#define HAVE_ADJUSTABLE_CPU_FREQ
199 198
200#define BOOTFILE_EXT "ipod" 199#define BOOTFILE_EXT "ipod"
201#define BOOTFILE "rockbox." BOOTFILE_EXT 200#define BOOTFILE "rockbox." BOOTFILE_EXT
diff --git a/firmware/export/s5l8702.h b/firmware/export/s5l8702.h
index bb3553ed14..076e661fa4 100644
--- a/firmware/export/s5l8702.h
+++ b/firmware/export/s5l8702.h
@@ -28,8 +28,7 @@
28#define REG16_PTR_T volatile uint16_t * 28#define REG16_PTR_T volatile uint16_t *
29#define REG32_PTR_T volatile uint32_t * 29#define REG32_PTR_T volatile uint32_t *
30 30
31//TODO: Figure out exact value 31#define TIMER_FREQ 54000000
32#define TIMER_FREQ 216000000
33 32
34#define CACHEALIGN_BITS (4) /* 2^4 = 16 bytes */ 33#define CACHEALIGN_BITS (4) /* 2^4 = 16 bytes */
35 34
@@ -42,8 +41,21 @@
42#define TTB_SIZE 0x4000 41#define TTB_SIZE 0x4000
43#define TTB_BASE_ADDR (DRAM_ORIG + DRAM_SIZE - TTB_SIZE) 42#define TTB_BASE_ADDR (DRAM_ORIG + DRAM_SIZE - TTB_SIZE)
44 43
45/////SYSCON///// 44/////SYSTEM CONTROLLER/////
46#define CLKCON0C (*((uint32_t volatile*)(0x3C50000C))) 45#define CLKCON0 (*((volatile uint32_t*)(0x3C500000)))
46#define CLKCON1 (*((volatile uint32_t*)(0x3C500004)))
47#define CLKCON2 (*((volatile uint32_t*)(0x3C500008)))
48#define CLKCON3 (*((volatile uint32_t*)(0x3C50000C)))
49#define CLKCON4 (*((volatile uint32_t*)(0x3C500010)))
50#define CLKCON5 (*((volatile uint32_t*)(0x3C500014)))
51#define PLL0PMS (*((volatile uint32_t*)(0x3C500020)))
52#define PLL1PMS (*((volatile uint32_t*)(0x3C500024)))
53#define PLL2PMS (*((volatile uint32_t*)(0x3C500028)))
54#define PLL0LCNT (*((volatile uint32_t*)(0x3C500030)))
55#define PLL1LCNT (*((volatile uint32_t*)(0x3C500034)))
56#define PLL2LCNT (*((volatile uint32_t*)(0x3C500038)))
57#define PLLLOCK (*((volatile uint32_t*)(0x3C500040)))
58#define PLLMODE (*((volatile uint32_t*)(0x3C500044)))
47#define PWRCON(i) (*((uint32_t volatile*)(0x3C500000 \ 59#define PWRCON(i) (*((uint32_t volatile*)(0x3C500000 \
48 + ((i) == 4 ? 0x6C : \ 60 + ((i) == 4 ? 0x6C : \
49 ((i) == 3 ? 0x68 : \ 61 ((i) == 3 ? 0x68 : \
diff --git a/firmware/target/arm/s5l8702/ipod6g/cscodec-ipod6g.c b/firmware/target/arm/s5l8702/ipod6g/cscodec-ipod6g.c
index 460b254730..41531de4e3 100644
--- a/firmware/target/arm/s5l8702/ipod6g/cscodec-ipod6g.c
+++ b/firmware/target/arm/s5l8702/ipod6g/cscodec-ipod6g.c
@@ -53,12 +53,12 @@ void cscodec_power(bool state)
53 53
54void cscodec_reset(bool state) 54void cscodec_reset(bool state)
55{ 55{
56 if (state) PDAT(3) &= ~8; 56 if (state) PDAT(3) &= ~8;
57 else PDAT(3) |= 8; 57 else PDAT(3) |= 8;
58} 58}
59 59
60void cscodec_clock(bool state) 60void cscodec_clock(bool state)
61{ 61{
62 if (state) CLKCON0C &= ~0xffff; 62 if (state) CLKCON3 &= ~0xffff;
63 else CLKCON0C |= 0x8000; 63 else CLKCON3 |= 0x8000;
64} 64}
diff --git a/firmware/target/arm/s5l8702/ipod6g/pmu-ipod6g.c b/firmware/target/arm/s5l8702/ipod6g/pmu-ipod6g.c
index 73d8f98083..c11c0ad416 100644
--- a/firmware/target/arm/s5l8702/ipod6g/pmu-ipod6g.c
+++ b/firmware/target/arm/s5l8702/ipod6g/pmu-ipod6g.c
@@ -79,6 +79,7 @@ int pmu_read_battery_voltage(void)
79/* milliamps */ 79/* milliamps */
80int pmu_read_battery_current(void) 80int pmu_read_battery_current(void)
81{ 81{
82//TODO: Figure out how to read the battery current
82// return pmu_read_adc(2); 83// return pmu_read_adc(2);
83 return 0; 84 return 0;
84} 85}
diff --git a/firmware/target/arm/s5l8702/system-s5l8702.c b/firmware/target/arm/s5l8702/system-s5l8702.c
index 6973738790..a4e82feef9 100644
--- a/firmware/target/arm/s5l8702/system-s5l8702.c
+++ b/firmware/target/arm/s5l8702/system-s5l8702.c
@@ -253,13 +253,16 @@ void set_cpu_frequency(long frequency)
253 if (cpu_frequency == frequency) 253 if (cpu_frequency == frequency)
254 return; 254 return;
255 255
256 //TODO: Need to understand this better
256 if (frequency == CPUFREQ_MAX) 257 if (frequency == CPUFREQ_MAX)
257 { 258 {
258 //TODO: Figure out and implement 259 CLKCON0 = 0x3011;
260 CLKCON1 = 0x4001;
259 } 261 }
260 else 262 else
261 { 263 {
262 //TODO: Figure out and implement 264 CLKCON1 = 0x404101;
265 CLKCON0 = 0x3000;
263 } 266 }
264 267
265 cpu_frequency = frequency; 268 cpu_frequency = frequency;
diff --git a/firmware/target/arm/s5l8702/system-target.h b/firmware/target/arm/s5l8702/system-target.h
index ed48eba6c4..30e53ad6ea 100644
--- a/firmware/target/arm/s5l8702/system-target.h
+++ b/firmware/target/arm/s5l8702/system-target.h
@@ -24,11 +24,10 @@
24#include "system-arm.h" 24#include "system-arm.h"
25#include "mmu-arm.h" 25#include "mmu-arm.h"
26 26
27//TODO: Figure out exact values
28#define CPUFREQ_SLEEP 32768 27#define CPUFREQ_SLEEP 32768
29#define CPUFREQ_MAX 216000000 28#define CPUFREQ_MAX 216000000
30#define CPUFREQ_DEFAULT 216000000 29#define CPUFREQ_DEFAULT 108000000
31#define CPUFREQ_NORMAL 216000000 30#define CPUFREQ_NORMAL 108000000
32 31
33#define STORAGE_WANTS_ALIGN 32#define STORAGE_WANTS_ALIGN
34 33