diff options
-rw-r--r-- | firmware/SOURCES | 2 | ||||
-rw-r--r-- | firmware/export/config/ipod6g.h | 7 | ||||
-rw-r--r-- | firmware/export/s5l8702.h | 17 | ||||
-rw-r--r-- | firmware/target/arm/s5l8702/usb-s5l8702.c | 137 |
4 files changed, 158 insertions, 5 deletions
diff --git a/firmware/SOURCES b/firmware/SOURCES index 9aab3c1115..2550475e15 100644 --- a/firmware/SOURCES +++ b/firmware/SOURCES | |||
@@ -1615,7 +1615,7 @@ target/arm/s5l8702/postmortemstub.S | |||
1615 | #endif | 1615 | #endif |
1616 | target/arm/s5l8702/ipod6g/pmu-ipod6g.c | 1616 | target/arm/s5l8702/ipod6g/pmu-ipod6g.c |
1617 | target/arm/s5l8702/ipod6g/rtc-ipod6g.c | 1617 | target/arm/s5l8702/ipod6g/rtc-ipod6g.c |
1618 | target/arm/s5l8700/usb-nano2g-6g.c | 1618 | target/arm/s5l8702/usb-s5l8702.c |
1619 | #ifdef HAVE_SERIAL | 1619 | #ifdef HAVE_SERIAL |
1620 | target/arm/uc870x.c | 1620 | target/arm/uc870x.c |
1621 | target/arm/s5l8702/uart-s5l8702.c | 1621 | target/arm/s5l8702/uart-s5l8702.c |
diff --git a/firmware/export/config/ipod6g.h b/firmware/export/config/ipod6g.h index cb8100bb55..01934a0cc2 100644 --- a/firmware/export/config/ipod6g.h +++ b/firmware/export/config/ipod6g.h | |||
@@ -238,12 +238,15 @@ | |||
238 | #define DEFAULT_BRIGHTNESS_SETTING 0x20 | 238 | #define DEFAULT_BRIGHTNESS_SETTING 0x20 |
239 | 239 | ||
240 | /* USB defines */ | 240 | /* USB defines */ |
241 | #define CONFIG_USBOTG USBOTG_DESIGNWARE | ||
242 | #define USB_DW_CLOCK 0 | ||
243 | #define USB_DW_TURNAROUND 5 | ||
244 | /* logf() over USB serial (http://www.rockbox.org/wiki/PortalPlayerUsb) */ | ||
245 | //#define USB_ENABLE_SERIAL | ||
241 | #define HAVE_USBSTACK | 246 | #define HAVE_USBSTACK |
242 | #define HAVE_USB_HID_MOUSE | 247 | #define HAVE_USB_HID_MOUSE |
243 | #define CONFIG_USBOTG USBOTG_S3C6400X | ||
244 | #define USB_VENDOR_ID 0x05AC | 248 | #define USB_VENDOR_ID 0x05AC |
245 | #define USB_PRODUCT_ID 0x1261 | 249 | #define USB_PRODUCT_ID 0x1261 |
246 | #define USB_NUM_ENDPOINTS 6 | ||
247 | #define USB_DEVBSS_ATTR __attribute__((aligned(32))) | 250 | #define USB_DEVBSS_ATTR __attribute__((aligned(32))) |
248 | 251 | ||
249 | #define USB_READ_BUFFER_SIZE (1024*24) | 252 | #define USB_READ_BUFFER_SIZE (1024*24) |
diff --git a/firmware/export/s5l8702.h b/firmware/export/s5l8702.h index 6500f69d37..4799b05d4f 100644 --- a/firmware/export/s5l8702.h +++ b/firmware/export/s5l8702.h | |||
@@ -175,8 +175,21 @@ | |||
175 | /////USB///// | 175 | /////USB///// |
176 | #define OTGBASE 0x38400000 | 176 | #define OTGBASE 0x38400000 |
177 | #define PHYBASE 0x3C400000 | 177 | #define PHYBASE 0x3C400000 |
178 | #define SYNOPSYSOTG_CLOCK 0 | 178 | |
179 | #define SYNOPSYSOTG_AHBCFG (GAHBCFG_dma_enable | (GAHBCFG_INT_DMA_BURST_INCR8 << GAHBCFG_hburstlen_bitp) | GAHBCFG_glblintrmsk) | 179 | /* OTG PHY control registers */ |
180 | #define OPHYPWR (*((uint32_t volatile*)(PHYBASE + 0x000))) | ||
181 | #define OPHYCLK (*((uint32_t volatile*)(PHYBASE + 0x004))) | ||
182 | #define ORSTCON (*((uint32_t volatile*)(PHYBASE + 0x008))) | ||
183 | #define OPHYUNK3 (*((uint32_t volatile*)(PHYBASE + 0x018))) | ||
184 | #define OPHYUNK1 (*((uint32_t volatile*)(PHYBASE + 0x01c))) | ||
185 | #define OPHYUNK2 (*((uint32_t volatile*)(PHYBASE + 0x044))) | ||
186 | |||
187 | /* 9 available EPs (0b00000001111101010000000111101011), 6 used */ | ||
188 | #define USB_NUM_ENDPOINTS 6 | ||
189 | |||
190 | /* Define this if the DWC implemented on this SoC does not support | ||
191 | DMA or you want to disable it. */ | ||
192 | // #define USB_DW_ARCH_SLAVE | ||
180 | 193 | ||
181 | 194 | ||
182 | /////I2C///// | 195 | /////I2C///// |
diff --git a/firmware/target/arm/s5l8702/usb-s5l8702.c b/firmware/target/arm/s5l8702/usb-s5l8702.c new file mode 100644 index 0000000000..7a349f74f4 --- /dev/null +++ b/firmware/target/arm/s5l8702/usb-s5l8702.c | |||
@@ -0,0 +1,137 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2014 Michael Sparmann | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or | ||
13 | * modify it under the terms of the GNU General Public License | ||
14 | * as published by the Free Software Foundation; either version 2 | ||
15 | * of the License, or (at your option) any later version. | ||
16 | * | ||
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
18 | * KIND, either express or implied. | ||
19 | * | ||
20 | ****************************************************************************/ | ||
21 | #include <inttypes.h> | ||
22 | |||
23 | #include "config.h" | ||
24 | #include "usb.h" | ||
25 | #include "usb_drv.h" | ||
26 | #ifdef HAVE_USBSTACK | ||
27 | #include "usb_core.h" | ||
28 | #endif | ||
29 | |||
30 | #include "s5l8702.h" | ||
31 | #include "clocking-s5l8702.h" | ||
32 | #include "usb-designware.h" | ||
33 | |||
34 | |||
35 | const struct usb_dw_config usb_dw_config = | ||
36 | { | ||
37 | .phytype = DWC_PHYTYPE_UTMI_16, | ||
38 | |||
39 | /* Available FIFO memory: 0x820 words */ | ||
40 | .rx_fifosz = 0x360, | ||
41 | .nptx_fifosz = 0x40, /* 1 dedicated FIFO for IN0 */ | ||
42 | .ptx_fifosz = 0x180, /* 3 dedicated FIFOs for IN1,IN3,IN5 */ | ||
43 | |||
44 | #ifdef USB_DW_ARCH_SLAVE | ||
45 | .disable_double_buffering = false, | ||
46 | #else | ||
47 | .ahb_burst_len = HBSTLEN_INCR8, | ||
48 | .ahb_threshold = 8, | ||
49 | #endif | ||
50 | }; | ||
51 | |||
52 | void usb_dw_target_enable_clocks() | ||
53 | { | ||
54 | clockgate_enable(CLOCKGATE_USBOTG, true); | ||
55 | clockgate_enable(CLOCKGATE_USBPHY, true); | ||
56 | |||
57 | OPHYPWR = 0; /* PHY: Power up */ | ||
58 | udelay(10); | ||
59 | OPHYUNK1 = 1; | ||
60 | OPHYUNK2 = 0xe3f; | ||
61 | ORSTCON = 1; /* PHY: Assert Software Reset */ | ||
62 | udelay(10); | ||
63 | ORSTCON = 0; /* PHY: Deassert Software Reset */ | ||
64 | udelay(10); | ||
65 | OPHYUNK3 = 0x600; | ||
66 | OPHYCLK = USB_DW_CLOCK; | ||
67 | udelay(400); | ||
68 | } | ||
69 | |||
70 | void usb_dw_target_disable_clocks() | ||
71 | { | ||
72 | OPHYPWR = 0xf; /* PHY: Power down */ | ||
73 | udelay(10); | ||
74 | ORSTCON = 7; /* PHY: Assert Software Reset */ | ||
75 | udelay(10); | ||
76 | |||
77 | clockgate_enable(CLOCKGATE_USBOTG, false); | ||
78 | clockgate_enable(CLOCKGATE_USBPHY, false); | ||
79 | } | ||
80 | |||
81 | void usb_dw_target_enable_irq() | ||
82 | { | ||
83 | VICINTENABLE(IRQ_USB_FUNC >> 5) = 1 << (IRQ_USB_FUNC & 0x1f); | ||
84 | } | ||
85 | |||
86 | void usb_dw_target_disable_irq() | ||
87 | { | ||
88 | VICINTENCLEAR(IRQ_USB_FUNC >> 5) = 1 << (IRQ_USB_FUNC & 0x1f); | ||
89 | } | ||
90 | |||
91 | void usb_dw_target_clear_irq() | ||
92 | { | ||
93 | } | ||
94 | |||
95 | /* RB API */ | ||
96 | static int usb_status = USB_EXTRACTED; | ||
97 | |||
98 | void usb_enable(bool on) | ||
99 | { | ||
100 | #ifdef HAVE_USBSTACK | ||
101 | if (on) usb_core_init(); | ||
102 | else usb_core_exit(); | ||
103 | #else | ||
104 | (void)on; | ||
105 | #endif | ||
106 | } | ||
107 | |||
108 | int usb_detect(void) | ||
109 | { | ||
110 | return usb_status; | ||
111 | } | ||
112 | |||
113 | void usb_insert_int(void) | ||
114 | { | ||
115 | usb_status = USB_INSERTED; | ||
116 | #ifdef USB_STATUS_BY_EVENT | ||
117 | usb_status_event(USB_INSERTED); | ||
118 | #endif | ||
119 | } | ||
120 | |||
121 | void usb_remove_int(void) | ||
122 | { | ||
123 | usb_status = USB_EXTRACTED; | ||
124 | #ifdef USB_STATUS_BY_EVENT | ||
125 | usb_status_event(USB_EXTRACTED); | ||
126 | #endif | ||
127 | } | ||
128 | |||
129 | void usb_init_device(void) | ||
130 | { | ||
131 | /* Power up the core clocks to allow writing | ||
132 | to some registers needed to power it down */ | ||
133 | usb_dw_target_disable_irq(); | ||
134 | usb_dw_target_enable_clocks(); | ||
135 | |||
136 | usb_drv_exit(); | ||
137 | } | ||