diff options
-rw-r--r-- | firmware/drivers/i2c.c | 31 | ||||
-rw-r--r-- | firmware/export/tcc730.h | 2 |
2 files changed, 31 insertions, 2 deletions
diff --git a/firmware/drivers/i2c.c b/firmware/drivers/i2c.c index 673f7f7e61..f5e8cb5240 100644 --- a/firmware/drivers/i2c.c +++ b/firmware/drivers/i2c.c | |||
@@ -17,13 +17,34 @@ | |||
17 | * | 17 | * |
18 | ****************************************************************************/ | 18 | ****************************************************************************/ |
19 | #include "lcd.h" | 19 | #include "lcd.h" |
20 | #include "sh7034.h" | 20 | #include "cpu.h" |
21 | #include "kernel.h" | 21 | #include "kernel.h" |
22 | #include "thread.h" | 22 | #include "thread.h" |
23 | #include "debug.h" | 23 | #include "debug.h" |
24 | #include "system.h" | 24 | #include "system.h" |
25 | 25 | ||
26 | /* cute little functions, atomic read-modify-write */ | 26 | /* cute little functions, atomic read-modify-write */ |
27 | #ifdef HAVE_GMINI_I2C | ||
28 | |||
29 | /* This is done like this in the Archos' firmware. | ||
30 | * However, the TCC370 has an integrated I2C | ||
31 | * controller (bound to the same lines). It should be | ||
32 | * possible to use it and thus save some space in flash. | ||
33 | */ | ||
34 | #define SDA_LO (P3 &= ~0x20) | ||
35 | #define SDA_HI (P3 |= 0x20) | ||
36 | #define SDA_INPUT (P3CONH &= ~0x0C) | ||
37 | #define SDA_OUTPUT (P3CONH |= 0x04) | ||
38 | #define SDA (P3 & 0x20) | ||
39 | |||
40 | #define SCL_LO (P3 &= ~0x10) | ||
41 | #define SCL_HI (P3 |= 0x10) | ||
42 | #define SCL_INPUT (P3CONH &= ~0x03) | ||
43 | #define SCL_OUTPUT (P3CONH |= 0x01) | ||
44 | #define SCL (P3 & 0x10) | ||
45 | |||
46 | #else | ||
47 | |||
27 | /* SDA is PB7 */ | 48 | /* SDA is PB7 */ |
28 | #define SDA_LO and_b(~0x80, &PBDRL) | 49 | #define SDA_LO and_b(~0x80, &PBDRL) |
29 | #define SDA_HI or_b(0x80, &PBDRL) | 50 | #define SDA_HI or_b(0x80, &PBDRL) |
@@ -46,6 +67,7 @@ | |||
46 | #define SCL_HI or_b(0x20, &PBDRH) | 67 | #define SCL_HI or_b(0x20, &PBDRH) |
47 | #define SCL (PBDR & 0x2000) | 68 | #define SCL (PBDR & 0x2000) |
48 | #endif | 69 | #endif |
70 | #endif | ||
49 | 71 | ||
50 | /* arbitrary delay loop */ | 72 | /* arbitrary delay loop */ |
51 | #define DELAY do { int _x; for(_x=0;_x<20;_x++);} while (0) | 73 | #define DELAY do { int _x; for(_x=0;_x<20;_x++);} while (0) |
@@ -84,6 +106,10 @@ void i2c_init(void) | |||
84 | { | 106 | { |
85 | int i; | 107 | int i; |
86 | 108 | ||
109 | #ifdef HAVE_GMINI_I2C | ||
110 | SCL_INPUT; | ||
111 | SDA_INPUT; | ||
112 | #else | ||
87 | #ifdef HAVE_ONDIO_I2C | 113 | #ifdef HAVE_ONDIO_I2C |
88 | /* make PB5, PB6 & PB7 general I/O */ | 114 | /* make PB5, PB6 & PB7 general I/O */ |
89 | PBCR2 &= ~0xfc00; /* includes PB5, see FIXME below */ | 115 | PBCR2 &= ~0xfc00; /* includes PB5, see FIXME below */ |
@@ -92,12 +118,13 @@ void i2c_init(void) | |||
92 | PBCR1 &= ~0x0c00; /* PB13 */ | 118 | PBCR1 &= ~0x0c00; /* PB13 */ |
93 | PBCR2 &= ~0xcc00; /* PB5 and PB7, see FIXME below */ | 119 | PBCR2 &= ~0xcc00; /* PB5 and PB7, see FIXME below */ |
94 | #endif | 120 | #endif |
95 | 121 | ||
96 | /* PB5 is "MAS enable" (no I2C signal!). make it output and high */ | 122 | /* PB5 is "MAS enable" (no I2C signal!). make it output and high */ |
97 | /* FIXME: this is true only for Players, and should go into mas.c */ | 123 | /* FIXME: this is true only for Players, and should go into mas.c */ |
98 | /* for Recorders, it shuts off the charger, for FM/V2 it holds power */ | 124 | /* for Recorders, it shuts off the charger, for FM/V2 it holds power */ |
99 | or_b(0x20, &PBIORL); | 125 | or_b(0x20, &PBIORL); |
100 | or_b(0x20, &PBDRL); | 126 | or_b(0x20, &PBDRL); |
127 | #endif | ||
101 | 128 | ||
102 | SCL_OUTPUT; | 129 | SCL_OUTPUT; |
103 | SDA_OUTPUT; | 130 | SDA_OUTPUT; |
diff --git a/firmware/export/tcc730.h b/firmware/export/tcc730.h index 97c4f2a578..4dfdb151b0 100644 --- a/firmware/export/tcc730.h +++ b/firmware/export/tcc730.h | |||
@@ -55,6 +55,8 @@ | |||
55 | #define P2CONH MMIO(unsigned char,0x42) | 55 | #define P2CONH MMIO(unsigned char,0x42) |
56 | #define P2CONL MMIO(unsigned char,0x43) | 56 | #define P2CONL MMIO(unsigned char,0x43) |
57 | #define P3CON MMIO(unsigned int,0x44) | 57 | #define P3CON MMIO(unsigned int,0x44) |
58 | #define P3CONH MMIO(unsigned char,0x44) | ||
59 | #define P3CONL MMIO(unsigned char,0x45) | ||
58 | #define P3PUR MMIO(unsigned char,0x46) | 60 | #define P3PUR MMIO(unsigned char,0x46) |
59 | #define P5CON MMIO(unsigned char,0x48) | 61 | #define P5CON MMIO(unsigned char,0x48) |
60 | #define P5PUR MMIO(unsigned char,0x49) | 62 | #define P5PUR MMIO(unsigned char,0x49) |