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-rw-r--r--bootloader/SOURCES6
-rw-r--r--bootloader/e200.c190
-rw-r--r--bootloader/main-pp.c (renamed from bootloader/h10.c)26
-rw-r--r--firmware/SOURCES6
-rw-r--r--firmware/boot.lds2
-rw-r--r--firmware/export/config-e200.h1
-rw-r--r--firmware/export/config-h10.h1
-rw-r--r--firmware/export/config-h10_5gb.h1
-rw-r--r--firmware/rolo.c5
-rw-r--r--firmware/target/arm/crt0-pp-bl.S179
-rw-r--r--firmware/target/arm/crt0-pp.S135
-rwxr-xr-xtools/configure4
-rw-r--r--tools/scramble.c4
13 files changed, 239 insertions, 321 deletions
diff --git a/bootloader/SOURCES b/bootloader/SOURCES
index 94f5a60e6b..b86365b429 100644
--- a/bootloader/SOURCES
+++ b/bootloader/SOURCES
@@ -2,10 +2,8 @@
2ipod.c 2ipod.c
3#elif defined(GIGABEAT_F) 3#elif defined(GIGABEAT_F)
4gigabeat.c 4gigabeat.c
5#elif defined(SANSA_E200) 5#elif defined(IRIVER_H10) || defined(IRIVER_H10_5GB) || defined(SANSA_E200)
6e200.c 6main-pp.c
7#elif defined(IRIVER_H10) || defined(IRIVER_H10_5GB)
8h10.c
9#elif defined(ELIO_TPJ1022) 7#elif defined(ELIO_TPJ1022)
10tpj1022.c 8tpj1022.c
11#else 9#else
diff --git a/bootloader/e200.c b/bootloader/e200.c
deleted file mode 100644
index 27b1118a1c..0000000000
--- a/bootloader/e200.c
+++ /dev/null
@@ -1,190 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2006 Daniel Stenberg
11 *
12 * All files in this archive are subject to the GNU General Public License.
13 * See the file COPYING in the source tree root for full license agreement.
14 *
15 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
16 * KIND, either express or implied.
17 *
18 ****************************************************************************/
19#include "config.h"
20
21#include <stdlib.h>
22#include <stdio.h>
23#include <string.h>
24#include "cpu.h"
25#include "system.h"
26#include "lcd.h"
27#include "kernel.h"
28#include "thread.h"
29#include "ata.h"
30#include "fat.h"
31#include "disk.h"
32#include "font.h"
33#include "adc.h"
34#include "backlight.h"
35#include "panic.h"
36#include "power.h"
37#include "file.h"
38
39static inline void blink(void)
40{
41 volatile unsigned int* ptr;
42 int i;
43 ptr = (volatile unsigned int*)0x70000020;
44
45 *ptr &= ~(1 << 13);
46 for(i = 0; i < 0xfffff; i++)
47 {
48 }
49 *ptr |= (1 << 13);
50 for(i = 0; i < 0xfffff; i++)
51 {
52 }
53}
54
55static inline void slow_blink(void)
56{
57 volatile unsigned int* ptr;
58 int i;
59 ptr = (volatile unsigned int*)0x70000020;
60
61 *ptr &= ~(1 << 13);
62 for(i = 0; i < (0xfffff); i++)
63 {
64 }
65 for(i = 0; i < (0xfffff); i++)
66 {
67 }
68 for(i = 0; i < (0xfffff); i++)
69 {
70 }
71
72 *ptr |= (1 << 13);
73 for(i = 0; i < (0xfffff); i++)
74 {
75 }
76 for(i = 0; i < (0xfffff); i++)
77 {
78 }
79 for(i = 0; i < (0xfffff); i++)
80 {
81 }
82}
83
84static inline unsigned long get_pc(void)
85{
86 unsigned long pc;
87 asm volatile (
88 "mov %0, pc\n"
89 : "=r"(pc)
90 );
91 return pc;
92}
93
94/* These functions are present in the firmware library, but we reimplement
95 them here because the originals do a lot more than we want */
96
97void reset_poweroff_timer(void)
98{
99}
100
101int dbg_ports(void)
102{
103 unsigned int gpio_a, gpio_b, gpio_c, gpio_d;
104 unsigned int gpio_e, gpio_f, gpio_g, gpio_h;
105 unsigned int gpio_i, gpio_j, gpio_k, gpio_l;
106
107 char buf[128];
108 int line;
109
110 lcd_setmargins(0, 0);
111 lcd_clear_display();
112 lcd_setfont(FONT_SYSFIXED);
113
114 while(1)
115 {
116 gpio_a = GPIOA_INPUT_VAL;
117 gpio_b = GPIOB_INPUT_VAL;
118 gpio_c = GPIOC_INPUT_VAL;
119
120 gpio_g = GPIOG_INPUT_VAL;
121 gpio_h = GPIOH_INPUT_VAL;
122 gpio_i = GPIOI_INPUT_VAL;
123
124 line = 0;
125 snprintf(buf, sizeof(buf), "GPIO_A: %02x GPIO_G: %02x", gpio_a, gpio_g);
126 lcd_puts(0, line++, buf);
127 snprintf(buf, sizeof(buf), "GPIO_B: %02x GPIO_H: %02x", gpio_b, gpio_h);
128 lcd_puts(0, line++, buf);
129 snprintf(buf, sizeof(buf), "GPIO_C: %02x GPIO_I: %02x", gpio_c, gpio_i);
130 lcd_puts(0, line++, buf);
131 line++;
132
133 gpio_d = GPIOD_INPUT_VAL;
134 gpio_e = GPIOE_INPUT_VAL;
135 gpio_f = GPIOF_INPUT_VAL;
136
137 gpio_j = GPIOJ_INPUT_VAL;
138 gpio_k = GPIOK_INPUT_VAL;
139 gpio_l = GPIOL_INPUT_VAL;
140
141 snprintf(buf, sizeof(buf), "GPIO_D: %02x GPIO_J: %02x", gpio_d, gpio_j);
142 lcd_puts(0, line++, buf);
143 snprintf(buf, sizeof(buf), "GPIO_E: %02x GPIO_K: %02x", gpio_e, gpio_k);
144 lcd_puts(0, line++, buf);
145 snprintf(buf, sizeof(buf), "GPIO_F: %02x GPIO_L: %02x", gpio_f, gpio_l);
146 lcd_puts(0, line++, buf);
147 line++;
148 snprintf(buf, sizeof(buf), "ADC_1: %02x", adc_read(ADC_0));
149 lcd_puts(0, line++, buf);
150 snprintf(buf, sizeof(buf), "ADC_2: %02x", adc_read(ADC_1));
151 lcd_puts(0, line++, buf);
152 snprintf(buf, sizeof(buf), "ADC_3: %02x", adc_read(ADC_2));
153 lcd_puts(0, line++, buf);
154 snprintf(buf, sizeof(buf), "ADC_4: %02x", adc_read(ADC_3));
155 lcd_puts(0, line++, buf);
156 lcd_update();
157 }
158 return 0;
159}
160
161void mpeg_stop(void)
162{
163}
164
165void usb_acknowledge(void)
166{
167}
168
169void usb_wait_for_disconnect(void)
170{
171}
172
173void sys_poweroff(void)
174{
175}
176
177void system_reboot(void)
178{
179
180}
181
182void main(void)
183{
184 kernel_init();
185 adc_init();
186 lcd_init_device();
187
188 dbg_ports();
189}
190
diff --git a/bootloader/h10.c b/bootloader/main-pp.c
index 0cfd64a96e..a533cc7044 100644
--- a/bootloader/h10.c
+++ b/bootloader/main-pp.c
@@ -40,8 +40,8 @@
40#include "power.h" 40#include "power.h"
41#include "file.h" 41#include "file.h"
42 42
43/* Size of the buffer to store the loaded Rockbox/iriver image */ 43/* Size of the buffer to store the loaded firmware image */
44#define MAX_LOADSIZE (5*1024*1024) 44#define MAX_LOADSIZE (10*1024*1024)
45 45
46/* A buffer to load the iriver firmware or Rockbox into */ 46/* A buffer to load the iriver firmware or Rockbox into */
47unsigned char loadbuffer[MAX_LOADSIZE]; 47unsigned char loadbuffer[MAX_LOADSIZE];
@@ -52,18 +52,18 @@ char version[] = APPSVERSION;
52 52
53int line=0; 53int line=0;
54 54
55/* Load original iriver firmware. This function expects a file called 55/* Load original mi4 firmware. This function expects a file called
56 "/System/Original.mi4" on the player. It should be decrypted 56 "/System/OF.bin" on the player. It should be a mi4 firmware decrypted
57 and have the header stripped using mi4code. It reads the file in to a memory 57 and header stripped using mi4code. It reads the file in to a memory
58 buffer called buf. The rest of the loading is done in main() and crt0.S 58 buffer called buf. The rest of the loading is done in main() and crt0.S
59*/ 59*/
60int load_iriver(unsigned char* buf) 60int load_original_firmware(unsigned char* buf)
61{ 61{
62 int fd; 62 int fd;
63 int rc; 63 int rc;
64 int len; 64 int len;
65 65
66 fd = open("/System/Original.mi4", O_RDONLY); 66 fd = open("/System/OF.bin", O_RDONLY);
67 67
68 len = filesize(fd); 68 len = filesize(fd);
69 69
@@ -78,7 +78,7 @@ int load_iriver(unsigned char* buf)
78 return len; 78 return len;
79} 79}
80 80
81/* Load Rockbox firmware (rockbox.h10) */ 81/* Load Rockbox firmware (rockbox.*) */
82int load_rockbox(unsigned char* buf) 82int load_rockbox(unsigned char* buf)
83{ 83{
84 int fd; 84 int fd;
@@ -164,6 +164,7 @@ void* main(void)
164 kernel_init(); 164 kernel_init();
165 lcd_init(); 165 lcd_init();
166 font_init(); 166 font_init();
167 button_init();
167 168
168 line=0; 169 line=0;
169 170
@@ -172,7 +173,7 @@ void* main(void)
172 lcd_puts(0, line++, "Rockbox boot loader"); 173 lcd_puts(0, line++, "Rockbox boot loader");
173 snprintf(buf, sizeof(buf), "Version: 20%s", version); 174 snprintf(buf, sizeof(buf), "Version: 20%s", version);
174 lcd_puts(0, line++, buf); 175 lcd_puts(0, line++, buf);
175 snprintf(buf, sizeof(buf), "iriver H10"); 176 snprintf(buf, sizeof(buf), MODEL_NAME);
176 lcd_puts(0, line++, buf); 177 lcd_puts(0, line++, buf);
177 lcd_update(); 178 lcd_update();
178 179
@@ -212,11 +213,11 @@ void* main(void)
212 i=button_read_device(); 213 i=button_read_device();
213 if(i==BUTTON_LEFT) 214 if(i==BUTTON_LEFT)
214 { 215 {
215 lcd_puts(0, line, "Loading iriver firmware..."); 216 lcd_puts(0, line++, "Loading original firmware...");
216 lcd_update(); 217 lcd_update();
217 rc=load_iriver(loadbuffer); 218 rc=load_original_firmware(loadbuffer);
218 } else { 219 } else {
219 lcd_puts(0, line, "Loading Rockbox..."); 220 lcd_puts(0, line++, "Loading Rockbox...");
220 lcd_update(); 221 lcd_update();
221 rc=load_rockbox(loadbuffer); 222 rc=load_rockbox(loadbuffer);
222 } 223 }
@@ -225,6 +226,7 @@ void* main(void)
225 snprintf(buf, sizeof(buf), "Rockbox error: %d",rc); 226 snprintf(buf, sizeof(buf), "Rockbox error: %d",rc);
226 lcd_puts(0, line++, buf); 227 lcd_puts(0, line++, buf);
227 lcd_update(); 228 lcd_update();
229 while(1) {}
228 } 230 }
229 231
230 memcpy((void*)DRAM_START,loadbuffer,rc); 232 memcpy((void*)DRAM_START,loadbuffer,rc);
diff --git a/firmware/SOURCES b/firmware/SOURCES
index f83abdbc51..386d3707c4 100644
--- a/firmware/SOURCES
+++ b/firmware/SOURCES
@@ -262,11 +262,13 @@ drivers/i2c-pnx0101.c
262/* no i2c driver yet */ 262/* no i2c driver yet */
263#endif 263#endif
264#if defined(CPU_PP) 264#if defined(CPU_PP)
265#ifndef BOOTLOADER 265#ifdef BOOTLOADER
266target/arm/crt0-pp-bl.S
267#else
266target/arm/pcm-pp.c 268target/arm/pcm-pp.c
267target/arm/audio-pp.c 269target/arm/audio-pp.c
268#endif
269target/arm/crt0-pp.S 270target/arm/crt0-pp.S
271#endif
270#elif defined(CPU_ARM) 272#elif defined(CPU_ARM)
271target/arm/crt0.S 273target/arm/crt0.S
272#endif /* defined(CPU_*) */ 274#endif /* defined(CPU_*) */
diff --git a/firmware/boot.lds b/firmware/boot.lds
index 556e8db990..6c307bd4de 100644
--- a/firmware/boot.lds
+++ b/firmware/boot.lds
@@ -8,7 +8,7 @@ INPUT(target/coldfire/crt0.o)
8OUTPUT_FORMAT(elf32-littlearm) 8OUTPUT_FORMAT(elf32-littlearm)
9OUTPUT_ARCH(arm) 9OUTPUT_ARCH(arm)
10#ifdef CPU_PP 10#ifdef CPU_PP
11INPUT(target/arm/crt0-pp.o) 11INPUT(target/arm/crt0-pp-bl.o)
12#else 12#else
13INPUT(target/arm/crt0.o) 13INPUT(target/arm/crt0.o)
14#endif 14#endif
diff --git a/firmware/export/config-e200.h b/firmware/export/config-e200.h
index 26b87c70fc..4c9e1b2d47 100644
--- a/firmware/export/config-e200.h
+++ b/firmware/export/config-e200.h
@@ -5,6 +5,7 @@
5 5
6/* For Rolo and boot loader */ 6/* For Rolo and boot loader */
7#define MODEL_NUMBER 16 7#define MODEL_NUMBER 16
8#define MODEL_NAME "Sandisk Sansa e200"
8 9
9/* define this if you have recording possibility */ 10/* define this if you have recording possibility */
10/*#define HAVE_RECORDING 1*/ /* TODO: add support for this */ 11/*#define HAVE_RECORDING 1*/ /* TODO: add support for this */
diff --git a/firmware/export/config-h10.h b/firmware/export/config-h10.h
index 0b17920736..ae2a150ae6 100644
--- a/firmware/export/config-h10.h
+++ b/firmware/export/config-h10.h
@@ -6,6 +6,7 @@
6 6
7/* For Rolo and boot loader */ 7/* For Rolo and boot loader */
8#define MODEL_NUMBER 13 8#define MODEL_NUMBER 13
9#define MODEL_NAME "iriver H10 20GB"
9 10
10/* define this if you have recording possibility */ 11/* define this if you have recording possibility */
11#define HAVE_RECORDING 1 12#define HAVE_RECORDING 1
diff --git a/firmware/export/config-h10_5gb.h b/firmware/export/config-h10_5gb.h
index 534c4a455f..42f774832a 100644
--- a/firmware/export/config-h10_5gb.h
+++ b/firmware/export/config-h10_5gb.h
@@ -6,6 +6,7 @@
6 6
7/* For Rolo and boot loader */ 7/* For Rolo and boot loader */
8#define MODEL_NUMBER 14 8#define MODEL_NUMBER 14
9#define MODEL_NAME "iriver H10 5/6GB"
9 10
10/* define this if you have recording possibility */ 11/* define this if you have recording possibility */
11#define HAVE_RECORDING 1 12#define HAVE_RECORDING 1
diff --git a/firmware/rolo.c b/firmware/rolo.c
index 6f7bae90c9..84b3280da5 100644
--- a/firmware/rolo.c
+++ b/firmware/rolo.c
@@ -31,9 +31,8 @@
31#include "buffer.h" 31#include "buffer.h"
32 32
33#if !defined(IRIVER_IFP7XX_SERIES) && \ 33#if !defined(IRIVER_IFP7XX_SERIES) && \
34 (CONFIG_CPU != PP5002) && !defined(IRIVER_H10) && \ 34 (CONFIG_CPU != PP5002) && (CONFIG_CPU != S3C2440)
35 !defined(IRIVER_H10_5GB) && (CONFIG_CPU != S3C2440) 35/* FIX: this doesn't work on iFP, 3rd Gen ipods */
36/* FIX: this doesn't work on iFP, 3rd Gen ipods, or H10 yet */
37 36
38#define IRQ0_EDGE_TRIGGER 0x80 37#define IRQ0_EDGE_TRIGGER 0x80
39 38
diff --git a/firmware/target/arm/crt0-pp-bl.S b/firmware/target/arm/crt0-pp-bl.S
new file mode 100644
index 0000000000..4f50cac699
--- /dev/null
+++ b/firmware/target/arm/crt0-pp-bl.S
@@ -0,0 +1,179 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2002 by Linus Nielsen Feltzing
11 *
12 * All files in this archive are subject to the GNU General Public License.
13 * See the file COPYING in the source tree root for full license agreement.
14 *
15 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
16 * KIND, either express or implied.
17 *
18 ****************************************************************************/
19#include "config.h"
20#include "cpu.h"
21
22 .section .init.text,"ax",%progbits
23
24 .global start
25start:
26
27/* PortalPlayer bootloader and startup code based on startup.s from the iPodLinux
28 * loader
29 *
30 * Copyright (c) 2003, Daniel Palffy (dpalffy (at) rainstorm.org)
31 * Copyright (c) 2005, Bernard Leach <leachbj@bouncycastle.org>
32 *
33 */
34#if CONFIG_CPU == PP5002
35 .equ PROC_ID, 0xc4000000
36 .equ COP_CTRL, 0xcf004058
37 .equ COP_STATUS, 0xcf004050
38 .equ IIS_CONFIG, 0xc0002500
39 .equ SLEEP, 0xca
40 .equ WAKE, 0xce
41 .equ SLEEPING, 0x4000
42#else
43 .equ PROC_ID, 0x60000000
44 .equ COP_CTRL, 0x60007004
45 .equ COP_STATUS, 0x60007004
46 .equ IIS_CONFIG, 0x70002800
47 .equ SLEEP, 0x80000000
48 .equ WAKE, 0x0
49 .equ SLEEPING, 0x80000000
50 .equ CACHE_CTRL, 0x6000c000
51#endif
52
53 msr cpsr_c, #0xd3 /* enter supervisor mode, disable IRQ */
54
55/* 1 - Copy the bootloader to IRAM */
56 /* get the high part of our execute address */
57 ldr r7, =0xffffff00
58 and r4, pc, r7
59
60 /* Copy bootloader to safe area - 0x40000000 (IRAM) */
61 mov r5, #0x40000000
62 ldr r6, = _dataend
631:
64 cmp r5, r6
65 ldrcc r2, [r4], #4
66 strcc r2, [r5], #4
67 bcc 1b
68
69#ifndef IPOD_ARCH
70 /* For builds on targets with mi4 firmware, scramble writes data to
71 0xe0-0xeb, so jump past that.*/
72 b pad_skip
73
74.space 60*4
75
76pad_skip:
77#endif
78
79
80/* 2 - Jump both CPU and COP there */
81 ldr pc, =start_loc /* jump to the relocated start_loc: */
82
83start_loc:
84
85 /* Find out which processor we are */
86 ldr r0, =PROC_ID
87 ldr r0, [r0]
88 and r0, r0, #0xff
89 cmp r0, #0x55
90 beq cpu
91
92 /* put us (co-processor) to sleep */
93 ldr r4, =COP_CTRL
94 mov r3, #SLEEP
95 str r3, [r4]
96 ldr pc, =cop_wake_start
97
98cop_wake_start:
99#if CONFIG_CPU != PP5002
100 /* COP: Invalidate cache */
101 ldr r0, =0xf000f044
102 ldr r1, [r0]
103 orr r1, r1, #0x6
104 str r1, [r0]
105
106 ldr r0, =CACHE_CTRL
1071:
108 ldr r1, [r0]
109 tst r1, #0x8000
110 bne 1b
111#endif
112
113 ldr r0, =startup_loc
114 ldr pc, [r0]
115
116cpu:
117 /* Wait for COP to be sleeping */
118 ldr r4, =COP_STATUS
1191:
120 ldr r3, [r4]
121 ands r3, r3, #SLEEPING
122 beq 1b
123
124 /* Initialise bss section to zero */
125 ldr r2, =_edata
126 ldr r3, =_end
127 mov r4, #0
1281:
129 cmp r3, r2
130 strhi r4, [r2], #4
131 bhi 1b
132
133 /* Set up some stack and munge it with 0xdeadbeef */
134 ldr sp, =stackend
135 mov r3, sp
136 ldr r2, =stackbegin
137 ldr r4, =0xdeadbeef
1381:
139 cmp r3, r2
140 strhi r4, [r2], #4
141 bhi 1b
142
143 /* execute the loader - this will load an image to 0x10000000 */
144 bl main
145
146 ldr r1, =startup_loc
147 str r0, [r1]
148
149#if CONFIG_CPU != PP5002
150 /* Flush cache */
151 ldr r3, =0xf000f044
152 ldr r4, [r3]
153 orr r4, r4, #0x2
154 str r4, [r3]
155
156 ldr r3, =CACHE_CTRL
1571:
158 ldr r4, [r3]
159 tst r4, #0x8000
160 bne 1b
161#endif
162
163 /* Wake up the coprocessor before executing the firmware */
164 ldr r4, =COP_CTRL
165 mov r3, #WAKE
166 str r3, [r4]
167
168 mov pc, r0
169
170startup_loc:
171 .word 0x0
172
173#ifdef IPOD_ARCH
174.align 8 /* starts at 0x100 */
175.global boot_table
176boot_table:
177 /* here comes the boot table, don't move its offset */
178 .space 400
179#endif
diff --git a/firmware/target/arm/crt0-pp.S b/firmware/target/arm/crt0-pp.S
index 17b1e8a4a3..892275e411 100644
--- a/firmware/target/arm/crt0-pp.S
+++ b/firmware/target/arm/crt0-pp.S
@@ -52,15 +52,9 @@ start:
52 52
53 msr cpsr_c, #0xd3 /* enter supervisor mode, disable IRQ */ 53 msr cpsr_c, #0xd3 /* enter supervisor mode, disable IRQ */
54 54
55#ifndef BOOTLOADER
56 b pad_skip 55 b pad_skip
57 56
58#if defined(SANSA_E200) 57.space 50*4 /* (more than enough) space for exception vectors */
59/* mi4tool writes junk between 0xe0 and 0xeb. Avoid this. */
60.space 60*4 /* (more than enough) space for exception vectors */
61#else
62.space 50*4
63#endif
64 58
65pad_skip: 59pad_skip:
66#ifdef SANSA_E200 60#ifdef SANSA_E200
@@ -108,11 +102,13 @@ remap_end:
108 102
109 /* After doing the remapping, send the COP to sleep. 103 /* After doing the remapping, send the COP to sleep.
110 On wakeup it will go to cop_init */ 104 On wakeup it will go to cop_init */
105
106 /* Find out which processor we are */
111 ldr r0, =PROC_ID 107 ldr r0, =PROC_ID
112 ldr r0, [r0] 108 ldr r0, [r0]
113 and r0, r0, #0xff 109 and r0, r0, #0xff
114 cmp r0, #0x55 110 cmp r0, #0x55
115 beq 1f 111 beq cpu_init
116 112
117 /* put us (co-processor) to sleep */ 113 /* put us (co-processor) to sleep */
118 ldr r4, =COP_CTRL 114 ldr r4, =COP_CTRL
@@ -121,9 +117,15 @@ remap_end:
121 117
122 ldr pc, =cop_init 118 ldr pc, =cop_init
123 119
1241:
125 120
126#ifndef DEBUG 121cpu_init:
122 /* Wait for COP to be sleeping */
123 ldr r4, =COP_STATUS
1241:
125 ldr r3, [r4]
126 ands r3, r3, #SLEEPING
127 beq 1b
128
127 /* Copy exception handler code to address 0 */ 129 /* Copy exception handler code to address 0 */
128 ldr r2, =_vectorsstart 130 ldr r2, =_vectorsstart
129 ldr r3, =_vectorsend 131 ldr r3, =_vectorsend
@@ -133,15 +135,7 @@ remap_end:
133 ldrhi r5, [r4], #4 135 ldrhi r5, [r4], #4
134 strhi r5, [r2], #4 136 strhi r5, [r2], #4
135 bhi 1b 137 bhi 1b
136#else
137 ldr r1, =vectors
138 ldr r0, =irq_handler
139 str r0, [r1, #24]
140 ldr r0, =fiq_handler
141 str r0, [r1, #28]
142#endif
143 138
144#ifndef STUB
145 /* Zero out IBSS */ 139 /* Zero out IBSS */
146 ldr r2, =_iedata 140 ldr r2, =_iedata
147 ldr r3, =_iend 141 ldr r3, =_iend
@@ -160,8 +154,6 @@ remap_end:
160 ldrhi r5, [r2], #4 154 ldrhi r5, [r2], #4
161 strhi r5, [r3], #4 155 strhi r5, [r3], #4
162 bhi 1b 156 bhi 1b
163#endif /* !STUB */
164#endif /* !BOOTLOADER */
165 157
166 /* Initialise bss section to zero */ 158 /* Initialise bss section to zero */
167 ldr r2, =_edata 159 ldr r2, =_edata
@@ -181,90 +173,6 @@ remap_end:
181 cmp r3, r2 173 cmp r3, r2
182 strhi r4, [r2], #4 174 strhi r4, [r2], #4
183 bhi 1b 175 bhi 1b
184
185#ifdef BOOTLOADER
186 /* TODO: the high part of the address is probably dependent on CONFIG_CPU.
187 Since we tend to use ifdefs for each chipset target
188 anyway, we might as well just hardcode it here.
189 */
190
191 /* get the high part of our execute address */
192 ldr r0, =0xff000000
193 and r8, pc, r0 @ r8 is used later
194
195 /* Find out which processor we are */
196 mov r0, #PROC_ID
197 ldr r0, [r0]
198 and r0, r0, #0xff
199 cmp r0, #0x55
200 beq 1f
201
202 /* put us (co-processor) to sleep */
203 ldr r4, =COP_CTRL
204 mov r3, #SLEEP
205 str r3, [r4]
206 ldr pc, =cop_wake_start
207
208cop_wake_start:
209 /* jump the COP to startup */
210 ldr r0, =startup_loc
211 ldr pc, [r0]
212
2131:
214
215 /* get the high part of our execute address */
216 ldr r2, =0xffffff00
217 and r4, pc, r2
218
219 /* Copy bootloader to safe area - 0x40000000 */
220 mov r5, #0x40000000
221 ldr r6, = _dataend
222 sub r0, r6, r5 /* length of loader */
223 add r0, r4, r0 /* r0 points to start of loader */
2241:
225 cmp r5, r6
226 ldrcc r2, [r4], #4
227 strcc r2, [r5], #4
228 bcc 1b
229
230 ldr pc, =start_loc /* jump to the relocated start_loc: */
231
232start_loc:
233
234 /* execute the loader - this will load an image to 0x10000000 */
235 bl main
236
237 /* Wake up the coprocessor before executing the firmware */
238
239 /* save the startup address for the COP */
240 ldr r1, =startup_loc
241 str r0, [r1]
242
243 /* make sure COP is sleeping */
244 ldr r4, =COP_STATUS
2451:
246 ldr r3, [r4]
247 ands r3, r3, #SLEEPING
248 beq 1b
249
250 /* wake up COP */
251 ldr r4, =COP_CTRL
252 mov r3, #WAKE
253 str r3, [r4]
254
255 /* jump to start location */
256 mov pc, r0
257
258startup_loc:
259 .word 0x0
260
261.align 8 /* starts at 0x100 */
262.global boot_table
263boot_table:
264 /* here comes the boot table, don't move its offset */
265 .space 400
266
267#else /* BOOTLOADER */
268 176
269 /* Set up stack for IRQ mode */ 177 /* Set up stack for IRQ mode */
270 msr cpsr_c, #0xd2 178 msr cpsr_c, #0xd2
@@ -290,6 +198,21 @@ boot_table:
290 /* main() should never return */ 198 /* main() should never return */
291 199
292cop_init: 200cop_init:
201#if CONFIG_CPU != PP5002
202 /* COP: Invalidate cache */
203 ldr r0, =0xf000f044
204 ldr r1, [r0]
205 orr r1, r1, #0x6
206 str r1, [r0]
207
208 ldr r0, =0x6000c000
2091:
210 ldr r1, [r0]
211 tst r1, #0x8000
212 bne 1b
213#endif
214
215 /* Setup stack for COP */
293 ldr sp, =cop_stackend 216 ldr sp, =cop_stackend
294 mov r3, sp 217 mov r3, sp
295 ldr r2, =cop_stackbegin 218 ldr r2, =cop_stackbegin
@@ -300,6 +223,8 @@ cop_init:
300 bhi 2b 223 bhi 2b
301 224
302 ldr sp, =cop_stackend 225 ldr sp, =cop_stackend
226
227 /* Run cop_main() in apps/main.c */
303 bl cop_main 228 bl cop_main
304 229
305/* Exception handlers. Will be copied to address 0 after memory remapping */ 230/* Exception handlers. Will be copied to address 0 after memory remapping */
@@ -385,5 +310,3 @@ irq_stack:
385/* 256 words of FIQ stack */ 310/* 256 words of FIQ stack */
386 .space 256*4 311 .space 256*4
387fiq_stack: 312fiq_stack:
388
389#endif /* BOOTLOADER */
diff --git a/tools/configure b/tools/configure
index 3a5c7352a6..4cb1f96291 100755
--- a/tools/configure
+++ b/tools/configure
@@ -1108,10 +1108,10 @@ EOF
1108 target="-DSANSA_E200" 1108 target="-DSANSA_E200"
1109 memory=32 # supposedly 1109 memory=32 # supposedly
1110 arm7tdmicc 1110 arm7tdmicc
1111 tool="$rootdir/tools/scramble -mi4v3" 1111 tool="$rootdir/tools/scramble -add=e200"
1112 bmp2rb_mono="$rootdir/tools/bmp2rb -f 0" 1112 bmp2rb_mono="$rootdir/tools/bmp2rb -f 0"
1113 bmp2rb_native="$rootdir/tools/bmp2rb -f 4" 1113 bmp2rb_native="$rootdir/tools/bmp2rb -f 4"
1114 output="PP5022.mi4" 1114 output="rockbox.e200"
1115 appextra="recorder:gui" 1115 appextra="recorder:gui"
1116 archosrom="" 1116 archosrom=""
1117 flash="" 1117 flash=""
diff --git a/tools/scramble.c b/tools/scramble.c
index 30d4ea9edb..fed19621f8 100644
--- a/tools/scramble.c
+++ b/tools/scramble.c
@@ -89,7 +89,7 @@ void usage(void)
89 "\t-mi4v3 PortalPlayer .mi4 format (revision 010301)\n" 89 "\t-mi4v3 PortalPlayer .mi4 format (revision 010301)\n"
90 "\t-add=X Rockbox generic \"add-up\" checksum format\n" 90 "\t-add=X Rockbox generic \"add-up\" checksum format\n"
91 "\t (X values: h100, h120, h140, h300, ipco, nano, ipvd\n" 91 "\t (X values: h100, h120, h140, h300, ipco, nano, ipvd\n"
92 "\t ip3g, ip4g, mini, x5, h10, h10_5gb)\n" 92 "\t ip3g, ip4g, mini, x5, h10, h10_5gb, tpj2, e200)\n"
93 "\nNo option results in Archos standard player/recorder format.\n"); 93 "\nNo option results in Archos standard player/recorder format.\n");
94 94
95 exit(1); 95 exit(1);
@@ -207,6 +207,8 @@ int main (int argc, char** argv)
207 modelnum = 14; 207 modelnum = 14;
208 else if(!strcmp(&argv[1][5], "tpj2")) 208 else if(!strcmp(&argv[1][5], "tpj2"))
209 modelnum = 15; 209 modelnum = 15;
210 else if(!strcmp(&argv[1][5], "e200"))
211 modelnum = 16;
210 else { 212 else {
211 fprintf(stderr, "unsupported model: %s\n", &argv[1][5]); 213 fprintf(stderr, "unsupported model: %s\n", &argv[1][5]);
212 return 2; 214 return 2;
generated by cgit v1.2.3 (git 2.39.1) at 2024-09-27 07:32:42 +0000