diff options
-rw-r--r-- | firmware/drivers/ata.c | 8 | ||||
-rwxr-xr-x | firmware/target/sh/archos/ata-archos.c | 28 | ||||
-rwxr-xr-x | firmware/target/sh/archos/ata-target.h | 3 |
3 files changed, 17 insertions, 22 deletions
diff --git a/firmware/drivers/ata.c b/firmware/drivers/ata.c index 5e69b36f2d..800bd1a31a 100644 --- a/firmware/drivers/ata.c +++ b/firmware/drivers/ata.c | |||
@@ -909,6 +909,7 @@ int ata_init(void) | |||
909 | { | 909 | { |
910 | int rc; | 910 | int rc; |
911 | bool coldstart = ata_is_coldstart(); | 911 | bool coldstart = ata_is_coldstart(); |
912 | /* must be called before ata_device_init() */ | ||
912 | 913 | ||
913 | mutex_init(&ata_mtx); | 914 | mutex_init(&ata_mtx); |
914 | 915 | ||
@@ -924,13 +925,10 @@ int ata_init(void) | |||
924 | sleep(HZ); /* allow voltage to build up */ | 925 | sleep(HZ); /* allow voltage to build up */ |
925 | } | 926 | } |
926 | 927 | ||
927 | #ifdef ATA_ADDRESS_DETECT | ||
928 | ata_address_detect(); | ||
929 | #endif | ||
930 | /* first try, hard reset at cold start only */ | 928 | /* first try, hard reset at cold start only */ |
931 | rc = init_and_check(coldstart); | 929 | rc = init_and_check(coldstart); |
932 | 930 | ||
933 | if (rc) | 931 | if (rc) |
934 | { /* failed? -> second try, always with hard reset */ | 932 | { /* failed? -> second try, always with hard reset */ |
935 | DEBUGF("ata: init failed, retrying...\n"); | 933 | DEBUGF("ata: init failed, retrying...\n"); |
936 | rc = init_and_check(true); | 934 | rc = init_and_check(true); |
diff --git a/firmware/target/sh/archos/ata-archos.c b/firmware/target/sh/archos/ata-archos.c index 73e56b8d84..c685700fa3 100755 --- a/firmware/target/sh/archos/ata-archos.c +++ b/firmware/target/sh/archos/ata-archos.c | |||
@@ -25,6 +25,9 @@ | |||
25 | #include "ata-target.h" | 25 | #include "ata-target.h" |
26 | #include "hwcompat.h" | 26 | #include "hwcompat.h" |
27 | 27 | ||
28 | #define ATA_CONTROL1 ((volatile unsigned char*)0x06200206) | ||
29 | #define ATA_CONTROL2 ((volatile unsigned char*)0x06200306) | ||
30 | |||
28 | volatile unsigned char* ata_control; | 31 | volatile unsigned char* ata_control; |
29 | int ata_io_address; /* 0x300 or 0x200 */ | 32 | int ata_io_address; /* 0x300 or 0x200 */ |
30 | 33 | ||
@@ -39,20 +42,6 @@ void ata_reset(void) | |||
39 | sleep(1); /* > 2ms */ | 42 | sleep(1); /* > 2ms */ |
40 | } | 43 | } |
41 | 44 | ||
42 | void ata_address_detect(void) | ||
43 | { | ||
44 | if (read_hw_mask() & ATA_ADDRESS_200) | ||
45 | { | ||
46 | ata_io_address = 0x200; /* For debug purposes only */ | ||
47 | ata_control = ATA_CONTROL1; | ||
48 | } | ||
49 | else | ||
50 | { | ||
51 | ata_io_address = 0x300; /* For debug purposes only */ | ||
52 | ata_control = ATA_CONTROL2; | ||
53 | } | ||
54 | } | ||
55 | |||
56 | void ata_enable(bool on) | 45 | void ata_enable(bool on) |
57 | { | 46 | { |
58 | if(on) | 47 | if(on) |
@@ -68,6 +57,17 @@ void ata_device_init(void) | |||
68 | or_b(0x02, &PAIORH); /* output for ATA reset */ | 57 | or_b(0x02, &PAIORH); /* output for ATA reset */ |
69 | or_b(0x02, &PADRH); /* release ATA reset */ | 58 | or_b(0x02, &PADRH); /* release ATA reset */ |
70 | PACR2 &= 0xBFFF; /* GPIO function for PA7 (IDE enable) */ | 59 | PACR2 &= 0xBFFF; /* GPIO function for PA7 (IDE enable) */ |
60 | |||
61 | if (read_hw_mask() & ATA_ADDRESS_200) | ||
62 | { | ||
63 | ata_io_address = 0x200; /* For debug purposes only */ | ||
64 | ata_control = ATA_CONTROL1; | ||
65 | } | ||
66 | else | ||
67 | { | ||
68 | ata_io_address = 0x300; /* For debug purposes only */ | ||
69 | ata_control = ATA_CONTROL2; | ||
70 | } | ||
71 | } | 71 | } |
72 | 72 | ||
73 | bool ata_is_coldstart(void) | 73 | bool ata_is_coldstart(void) |
diff --git a/firmware/target/sh/archos/ata-target.h b/firmware/target/sh/archos/ata-target.h index ddffb34f5a..ae9329387d 100755 --- a/firmware/target/sh/archos/ata-target.h +++ b/firmware/target/sh/archos/ata-target.h | |||
@@ -22,14 +22,11 @@ | |||
22 | /* asm optimised read & write loops */ | 22 | /* asm optimised read & write loops */ |
23 | #define ATA_OPTIMIZED_READING | 23 | #define ATA_OPTIMIZED_READING |
24 | #define ATA_OPTIMIZED_WRITING | 24 | #define ATA_OPTIMIZED_WRITING |
25 | #define ATA_ADDRESS_DETECT /* need address detection */ | ||
26 | 25 | ||
27 | #define SWAP_WORDS | 26 | #define SWAP_WORDS |
28 | 27 | ||
29 | #define ATA_IOBASE 0x06100100 | 28 | #define ATA_IOBASE 0x06100100 |
30 | #define ATA_DATA (*((volatile unsigned short*)0x06104100)) | 29 | #define ATA_DATA (*((volatile unsigned short*)0x06104100)) |
31 | #define ATA_CONTROL1 ((volatile unsigned char*)0x06200206) | ||
32 | #define ATA_CONTROL2 ((volatile unsigned char*)0x06200306) | ||
33 | #define ATA_CONTROL (*ata_control) | 30 | #define ATA_CONTROL (*ata_control) |
34 | 31 | ||
35 | #define ATA_ERROR (*((volatile unsigned char*)ATA_IOBASE + 1)) | 32 | #define ATA_ERROR (*((volatile unsigned char*)ATA_IOBASE + 1)) |