diff options
-rw-r--r-- | firmware/target/mips/ingenic_jz47xx/codec-jz4740.c | 36 |
1 files changed, 15 insertions, 21 deletions
diff --git a/firmware/target/mips/ingenic_jz47xx/codec-jz4740.c b/firmware/target/mips/ingenic_jz47xx/codec-jz4740.c index 05ca2d02d4..44d291f312 100644 --- a/firmware/target/mips/ingenic_jz47xx/codec-jz4740.c +++ b/firmware/target/mips/ingenic_jz47xx/codec-jz4740.c | |||
@@ -48,8 +48,6 @@ static int HP_register_value; | |||
48 | #endif | 48 | #endif |
49 | static bool HP_on_off_flag; | 49 | static bool HP_on_off_flag; |
50 | 50 | ||
51 | static void i2s_codec_set_samplerate(unsigned short rate); | ||
52 | |||
53 | static void i2s_codec_reset(void) | 51 | static void i2s_codec_reset(void) |
54 | { | 52 | { |
55 | REG_ICDC_CDCCR1 = (ICDC_CDCCR1_SW2ON | ICDC_CDCCR1_PDVR | ICDC_CDCCR1_PDVRA | ICDC_CDCCR1_VRCGL | | 53 | REG_ICDC_CDCCR1 = (ICDC_CDCCR1_SW2ON | ICDC_CDCCR1_PDVR | ICDC_CDCCR1_PDVRA | ICDC_CDCCR1_VRCGL | |
@@ -80,7 +78,7 @@ static void i2s_codec_init(void) | |||
80 | 78 | ||
81 | //REG_ICDC_CDCCR2 = (ICDC_CDCCR2_AINVOL(ICDC_CDCCR2_AINVOL_DB(0)) | ICDC_CDCCR2_SMPR(ICDC_CDCCR2_SMPR_48) | 79 | //REG_ICDC_CDCCR2 = (ICDC_CDCCR2_AINVOL(ICDC_CDCCR2_AINVOL_DB(0)) | ICDC_CDCCR2_SMPR(ICDC_CDCCR2_SMPR_48) |
82 | REG_ICDC_CDCCR2 = ( ICDC_CDCCR2_AINVOL(14) | ICDC_CDCCR2_SMPR(ICDC_CDCCR2_SMPR_44) | 80 | REG_ICDC_CDCCR2 = ( ICDC_CDCCR2_AINVOL(14) | ICDC_CDCCR2_SMPR(ICDC_CDCCR2_SMPR_44) |
83 | | ICDC_CDCCR2_HPVOL(ICDC_CDCCR2_HPVOL_6)); | 81 | | ICDC_CDCCR2_HPVOL(ICDC_CDCCR2_HPVOL_0)); |
84 | 82 | ||
85 | REG_ICDC_CDCCR1 &= ~(ICDC_CDCCR1_SUSPD | ICDC_CDCCR1_RST); | 83 | REG_ICDC_CDCCR1 &= ~(ICDC_CDCCR1_SUSPD | ICDC_CDCCR1_RST); |
86 | 84 | ||
@@ -98,8 +96,6 @@ static void i2s_codec_init(void) | |||
98 | ICDC_CDCCR1_SW1ON | ICDC_CDCCR1_HPMUTE)) | (ICDC_CDCCR1_EDAC | 96 | ICDC_CDCCR1_SW1ON | ICDC_CDCCR1_HPMUTE)) | (ICDC_CDCCR1_EDAC |
99 | | ICDC_CDCCR1_SW2ON); | 97 | | ICDC_CDCCR1_SW2ON); |
100 | 98 | ||
101 | REG_ICDC_CDCCR2 |= 3; | ||
102 | |||
103 | HP_on_off_flag = 1; /* HP is on */ | 99 | HP_on_off_flag = 1; /* HP is on */ |
104 | } | 100 | } |
105 | 101 | ||
@@ -265,46 +261,44 @@ static void HP_turn_off(void) | |||
265 | } | 261 | } |
266 | #endif | 262 | #endif |
267 | 263 | ||
268 | static void i2s_codec_set_samplerate(unsigned short rate) | 264 | static void i2s_codec_set_samplerate(unsigned int rate) |
269 | { | 265 | { |
270 | unsigned short speed = 0; | 266 | unsigned int speed; |
271 | 267 | ||
272 | switch (rate) | 268 | switch (rate) |
273 | { | 269 | { |
274 | case 8000: | 270 | case 8000: |
275 | speed = 0 << 8; | 271 | speed = ICDC_CDCCR2_SMPR(ICDC_CDCCR2_SMPR_8); |
276 | break; | 272 | break; |
277 | case 11025: | 273 | case 11025: |
278 | speed = 1 << 8; | 274 | speed = ICDC_CDCCR2_SMPR(ICDC_CDCCR2_SMPR_11); |
279 | break; | 275 | break; |
280 | case 12000: | 276 | case 12000: |
281 | speed = 2 << 8; | 277 | speed = ICDC_CDCCR2_SMPR(ICDC_CDCCR2_SMPR_12); |
282 | break; | 278 | break; |
283 | case 16000: | 279 | case 16000: |
284 | speed = 3 << 8; | 280 | speed = ICDC_CDCCR2_SMPR(ICDC_CDCCR2_SMPR_16); |
285 | break; | 281 | break; |
286 | case 22050: | 282 | case 22050: |
287 | speed = 4 << 8; | 283 | speed = ICDC_CDCCR2_SMPR(ICDC_CDCCR2_SMPR_22); |
288 | break; | 284 | break; |
289 | case 24000: | 285 | case 24000: |
290 | speed = 5 << 8; | 286 | speed = ICDC_CDCCR2_SMPR(ICDC_CDCCR2_SMPR_24); |
291 | break; | 287 | break; |
292 | case 32000: | 288 | case 32000: |
293 | speed = 6 << 8; | 289 | speed = ICDC_CDCCR2_SMPR(ICDC_CDCCR2_SMPR_32); |
294 | break; | 290 | break; |
295 | case 44100: | 291 | case 44100: |
296 | speed = 7 << 8; | 292 | speed = ICDC_CDCCR2_SMPR(ICDC_CDCCR2_SMPR_44); |
297 | break; | 293 | break; |
298 | case 48000: | 294 | case 48000: |
299 | speed = 8 << 8; | 295 | speed = ICDC_CDCCR2_SMPR(ICDC_CDCCR2_SMPR_48); |
300 | break; | 296 | break; |
301 | default: | 297 | default: |
302 | break; | 298 | return; |
303 | } | 299 | } |
304 | REG_ICDC_CDCCR2 |= 0x00000f00; | 300 | REG_ICDC_CDCCR2 &= ~ICDC_CDCCR2_SMPR(0xF); |
305 | 301 | REG_ICDC_CDCCR2 |= speed; | |
306 | speed |= 0xfffff0ff; | ||
307 | REG_ICDC_CDCCR2 &= speed; | ||
308 | } | 302 | } |
309 | 303 | ||
310 | void audiohw_mute(bool mute) | 304 | void audiohw_mute(bool mute) |