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-rw-r--r--firmware/drivers/audio/uda1341.c354
1 files changed, 177 insertions, 177 deletions
diff --git a/firmware/drivers/audio/uda1341.c b/firmware/drivers/audio/uda1341.c
index e26525b77a..7108250444 100644
--- a/firmware/drivers/audio/uda1341.c
+++ b/firmware/drivers/audio/uda1341.c
@@ -1,48 +1,48 @@
1/*************************************************************************** 1/***************************************************************************
2 * __________ __ ___. 2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___ 3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / 4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < 5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ 6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/ 7 * \/ \/ \/ \/ \/
8 * $Id: uda1380.c 21975 2009-07-19 22:45:32Z bertrik $ 8 * $Id: uda1380.c 21975 2009-07-19 22:45:32Z bertrik $
9 * 9 *
10 * Copyright (C) 2009 by Bob Cousins 10 * Copyright (C) 2009 by Bob Cousins
11 * 11 *
12 * This program is free software; you can redistribute it and/or 12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License 13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2 14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version. 15 * of the License, or (at your option) any later version.
16 * 16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY 17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied. 18 * KIND, either express or implied.
19 * 19 *
20 ****************************************************************************/ 20 ****************************************************************************/
21#include <string.h> 21#include <string.h>
22 22
23#include "config.h" 23#include "config.h"
24#include "logf.h" 24#include "logf.h"
25#include "system.h" 25#include "system.h"
26#include "audio.h" 26#include "audio.h"
27#include "debug.h" 27#include "debug.h"
28 28
29#include "audiohw.h" 29#include "audiohw.h"
30 30
31 31
32const struct sound_settings_info audiohw_settings[] = { 32const struct sound_settings_info audiohw_settings[] = {
33 [SOUND_VOLUME] = {"dB", 0, 1, -84, 0, -25}, 33 [SOUND_VOLUME] = {"dB", 0, 1, -84, 0, -25},
34 [SOUND_BASS] = {"dB", 0, 2, 0, 24, 0}, 34 [SOUND_BASS] = {"dB", 0, 2, 0, 24, 0},
35 [SOUND_TREBLE] = {"dB", 0, 2, 0, 6, 0}, 35 [SOUND_TREBLE] = {"dB", 0, 2, 0, 6, 0},
36 [SOUND_BALANCE] = {"%", 0, 1,-100, 100, 0}, /* not used */ 36 [SOUND_BALANCE] = {"%", 0, 1,-100, 100, 0}, /* not used */
37 [SOUND_CHANNELS] = {"", 0, 1, 0, 5, 0}, /* not used */ 37 [SOUND_CHANNELS] = {"", 0, 1, 0, 5, 0}, /* not used */
38 [SOUND_STEREO_WIDTH] = {"%", 0, 5, 0, 250, 100}, /* not used */ 38 [SOUND_STEREO_WIDTH] = {"%", 0, 5, 0, 250, 100}, /* not used */
39#ifdef HAVE_RECORDING 39#ifdef HAVE_RECORDING
40 [SOUND_LEFT_GAIN] = {"dB", 1, 1,-128, 96, 0}, 40 [SOUND_LEFT_GAIN] = {"dB", 1, 1,-128, 96, 0},
41 [SOUND_RIGHT_GAIN] = {"dB", 1, 1,-128, 96, 0}, 41 [SOUND_RIGHT_GAIN] = {"dB", 1, 1,-128, 96, 0},
42 [SOUND_MIC_GAIN] = {"dB", 1, 1,-128, 108, 16}, 42 [SOUND_MIC_GAIN] = {"dB", 1, 1,-128, 108, 16},
43#endif 43#endif
44}; 44};
45 45
46/* convert tenth of dB volume (-600..0) to master volume register value */ 46/* convert tenth of dB volume (-600..0) to master volume register value */
47int tenthdb2master(int db) 47int tenthdb2master(int db)
48{ 48{
@@ -54,118 +54,118 @@ int tenthdb2master(int db)
54 54
55static unsigned short uda_regs[NUM_REG_ID]; 55static unsigned short uda_regs[NUM_REG_ID];
56 56
57/****************************************************************************/ 57/****************************************************************************/
58 58
59/* ------------------------------------------------- */ 59/* ------------------------------------------------- */
60/* Local functions and variables */ 60/* Local functions and variables */
61/* ------------------------------------------------- */ 61/* ------------------------------------------------- */
62 62
63/* Generic L3 functions */ 63/* Generic L3 functions */
64 64
65#define L3PORT GPBDAT 65#define L3PORT GPBDAT
66#define L3MODE (1 << 2) 66#define L3MODE (1 << 2)
67#define L3DATA (1 << 3) 67#define L3DATA (1 << 3)
68#define L3CLOCK (1 << 4) 68#define L3CLOCK (1 << 4)
69 69
70static void l3_init (void) 70static void l3_init (void)
71{ 71{
72 L3PORT |= L3MODE | L3CLOCK; 72 L3PORT |= L3MODE | L3CLOCK;
73 L3PORT &= ~L3DATA; 73 L3PORT &= ~L3DATA;
74 74
75 S3C2440_GPIO_CONFIG (GPBCON, 2, GPIO_OUTPUT); /* L3 MODE */ 75 S3C2440_GPIO_CONFIG (GPBCON, 2, GPIO_OUTPUT); /* L3 MODE */
76 S3C2440_GPIO_CONFIG (GPBCON, 3, GPIO_OUTPUT); /* L3 DATA */ 76 S3C2440_GPIO_CONFIG (GPBCON, 3, GPIO_OUTPUT); /* L3 DATA */
77 S3C2440_GPIO_CONFIG (GPBCON, 4, GPIO_OUTPUT); /* L3 CLOCK */ 77 S3C2440_GPIO_CONFIG (GPBCON, 4, GPIO_OUTPUT); /* L3 CLOCK */
78 78
79 S3C2440_GPIO_PULLUP (GPBUP, 2, GPIO_PULLUP_DISABLE); 79 S3C2440_GPIO_PULLUP (GPBUP, 2, GPIO_PULLUP_DISABLE);
80 S3C2440_GPIO_PULLUP (GPBUP, 3, GPIO_PULLUP_DISABLE); 80 S3C2440_GPIO_PULLUP (GPBUP, 3, GPIO_PULLUP_DISABLE);
81 S3C2440_GPIO_PULLUP (GPBUP, 4, GPIO_PULLUP_DISABLE); 81 S3C2440_GPIO_PULLUP (GPBUP, 4, GPIO_PULLUP_DISABLE);
82} 82}
83 83
84static void bit_delay (void) 84static void bit_delay (void)
85{ 85{
86 volatile int j; 86 volatile int j;
87 for (j=0; j<5; j++) 87 for (j=0; j<5; j++)
88 ; 88 ;
89} 89}
90 90
91static void l3_write_byte (unsigned char data, bool address_mode) 91static void l3_write_byte (unsigned char data, bool address_mode)
92{ 92{
93 int bit; 93 int bit;
94 94
95 L3PORT |= L3CLOCK; 95 L3PORT |= L3CLOCK;
96 if (address_mode) 96 if (address_mode)
97 L3PORT &= ~L3MODE; 97 L3PORT &= ~L3MODE;
98 else 98 else
99 L3PORT |= L3MODE; 99 L3PORT |= L3MODE;
100 bit_delay(); 100 bit_delay();
101 101
102 for (bit=0; bit < 8; bit++) 102 for (bit=0; bit < 8; bit++)
103 { 103 {
104 if (data & 1) 104 if (data & 1)
105 { 105 {
106 L3PORT |= L3DATA; 106 L3PORT |= L3DATA;
107 } 107 }
108 else 108 else
109 { 109 {
110 L3PORT &= ~L3DATA; 110 L3PORT &= ~L3DATA;
111 } 111 }
112 L3PORT &= ~L3CLOCK; 112 L3PORT &= ~L3CLOCK;
113 bit_delay(); 113 bit_delay();
114 L3PORT |= L3CLOCK; 114 L3PORT |= L3CLOCK;
115 bit_delay(); 115 bit_delay();
116 116
117 data >>= 1; 117 data >>= 1;
118 } 118 }
119 119
120 if (address_mode) 120 if (address_mode)
121 L3PORT |= L3MODE; 121 L3PORT |= L3MODE;
122 else 122 else
123 L3PORT &= ~L3MODE; 123 L3PORT &= ~L3MODE;
124 bit_delay(); 124 bit_delay();
125} 125}
126 126
127static void l3_write_addr (unsigned char addr) 127static void l3_write_addr (unsigned char addr)
128{ 128{
129 /* write address byte */ 129 /* write address byte */
130 l3_write_byte (addr, true); 130 l3_write_byte (addr, true);
131} 131}
132 132
133static void l3_write_data (unsigned char data) 133static void l3_write_data (unsigned char data)
134{ 134{
135 /* write data byte */ 135 /* write data byte */
136 l3_write_byte (data, false); 136 l3_write_byte (data, false);
137} 137}
138 138
139/****************************************************************************/ 139/****************************************************************************/
140 140
141/* UDA1341 access functions */ 141/* UDA1341 access functions */
142 142
143static int udacodec_write(unsigned char reg, unsigned short value) 143static int udacodec_write(unsigned char reg, unsigned short value)
144{ 144{
145 l3_write_addr (UDA1341_ADDR | reg); 145 l3_write_addr (UDA1341_ADDR | reg);
146 l3_write_data (value & 0xff); 146 l3_write_data (value & 0xff);
147 return 0; 147 return 0;
148} 148}
149 149
150static void udacodec_reset(void) 150static void udacodec_reset(void)
151{ 151{
152 /* uda reset */ 152 /* uda reset */
153 l3_init(); 153 l3_init();
154 154
155 udacodec_write (UDA_REG_STATUS, UDA_STATUS_0 | UDA_RESET | UDA_SYSCLK_256FS | 155 udacodec_write (UDA_REG_STATUS, UDA_STATUS_0 | UDA_RESET | UDA_SYSCLK_256FS |
156 I2S_IFMT_IIS); 156 I2S_IFMT_IIS);
157 udacodec_write (UDA_REG_STATUS, UDA_STATUS_0 | UDA_SYSCLK_256FS | I2S_IFMT_IIS); 157 udacodec_write (UDA_REG_STATUS, UDA_STATUS_0 | UDA_SYSCLK_256FS | I2S_IFMT_IIS);
158 udacodec_write (UDA_REG_STATUS, UDA_STATUS_1 | UDA_POWER_DAC_ON); 158 udacodec_write (UDA_REG_STATUS, UDA_STATUS_1 | UDA_POWER_DAC_ON);
159 159
160 uda_regs[UDA_REG_ID_CTRL2] = UDA_PEAK_DETECT_POS_AFTER | 160 uda_regs[UDA_REG_ID_CTRL2] = UDA_PEAK_DETECT_POS_AFTER |
161 UDA_DE_EMPHASIS_NONE | UDA_MUTE_OFF | UDA_MODE_SWITCH_FLAT; 161 UDA_DE_EMPHASIS_NONE | UDA_MUTE_OFF | UDA_MODE_SWITCH_FLAT;
162 162
163} 163}
164 164
165/****************************************************************************/ 165/****************************************************************************/
166 166
167/* Audio API functions */ 167/* Audio API functions */
168 168
169/* This table must match the table in pcm-xxxx.c if using Master mode */ 169/* This table must match the table in pcm-xxxx.c if using Master mode */
170/* [reserved, master clock rate] */ 170/* [reserved, master clock rate] */
171static const unsigned char uda_freq_parms[HW_NUM_FREQ][2] = 171static const unsigned char uda_freq_parms[HW_NUM_FREQ][2] =
@@ -175,71 +175,71 @@ static const unsigned char uda_freq_parms[HW_NUM_FREQ][2] =
175 [HW_FREQ_11] = { 0, UDA_SYSCLK_256FS }, 175 [HW_FREQ_11] = { 0, UDA_SYSCLK_256FS },
176}; 176};
177 177
178void audiohw_init(void) 178void audiohw_init(void)
179{ 179{
180 udacodec_reset(); 180 udacodec_reset();
181 181
182 audiohw_set_bass (0); 182 audiohw_set_bass (0);
183 audiohw_set_treble (0); 183 audiohw_set_treble (0);
184 audiohw_set_master_vol (26, 26); /* -25 dB */ 184 audiohw_set_master_vol (26, 26); /* -25 dB */
185} 185}
186 186
187void audiohw_postinit(void) 187void audiohw_postinit(void)
188{ 188{
189} 189}
190 190
191void audiohw_close(void) 191void audiohw_close(void)
192{ 192{
193 /* DAC, ADC off */ 193 /* DAC, ADC off */
194 udacodec_write (UDA_REG_STATUS, UDA_STATUS_1 | 0); 194 udacodec_write (UDA_REG_STATUS, UDA_STATUS_1 | 0);
195} 195}
196 196
197void audiohw_set_bass(int value) 197void audiohw_set_bass(int value)
198{ 198{
199 uda_regs [UDA_REG_ID_CTRL1] &= UDA_BASS_BOOST (UDA_BASS_BOOST_MASK); 199 uda_regs [UDA_REG_ID_CTRL1] &= UDA_BASS_BOOST (UDA_BASS_BOOST_MASK);
200 uda_regs [UDA_REG_ID_CTRL1] |= UDA_BASS_BOOST (value & UDA_BASS_BOOST_MASK); 200 uda_regs [UDA_REG_ID_CTRL1] |= UDA_BASS_BOOST (value & UDA_BASS_BOOST_MASK);
201 201
202 udacodec_write (UDA_REG_DATA0, UDA_DATA_CTRL1 | uda_regs [UDA_REG_ID_CTRL1] ); 202 udacodec_write (UDA_REG_DATA0, UDA_DATA_CTRL1 | uda_regs [UDA_REG_ID_CTRL1] );
203} 203}
204 204
205void audiohw_set_treble(int value) 205void audiohw_set_treble(int value)
206{ 206{
207 uda_regs [UDA_REG_ID_CTRL1] &= UDA_TREBLE (UDA_TREBLE_MASK); 207 uda_regs [UDA_REG_ID_CTRL1] &= UDA_TREBLE (UDA_TREBLE_MASK);
208 uda_regs [UDA_REG_ID_CTRL1] |= UDA_TREBLE (value & UDA_TREBLE_MASK); 208 uda_regs [UDA_REG_ID_CTRL1] |= UDA_TREBLE (value & UDA_TREBLE_MASK);
209 209
210 udacodec_write (UDA_REG_DATA0, UDA_DATA_CTRL1 | uda_regs [UDA_REG_ID_CTRL1] ); 210 udacodec_write (UDA_REG_DATA0, UDA_DATA_CTRL1 | uda_regs [UDA_REG_ID_CTRL1] );
211} 211}
212 212
213/*static void audiohw_mute(bool mute) 213/*static void audiohw_mute(bool mute)
214{ 214{
215 if (mute) 215 if (mute)
216 uda_regs [UDA_REG_ID_CTRL2] |= UDA_MUTE_ON; 216 uda_regs [UDA_REG_ID_CTRL2] |= UDA_MUTE_ON;
217 else 217 else
218 uda_regs [UDA_REG_ID_CTRL2] &= ~UDA_MUTE_ON; 218 uda_regs [UDA_REG_ID_CTRL2] &= ~UDA_MUTE_ON;
219 219
220 udacodec_write (UDA_REG_DATA0, UDA_DATA_CTRL2 | uda_regs [UDA_REG_ID_CTRL2] );*/ 220 udacodec_write (UDA_REG_DATA0, UDA_DATA_CTRL2 | uda_regs [UDA_REG_ID_CTRL2] );*/
221} 221}
222 222
223void audiohw_set_prescaler(int val) 223void audiohw_set_prescaler(int val)
224{ 224{
225 (void)val; 225 (void)val;
226} 226}
227 227
228/** 228/**
229 * Sets left and right master volume (1(max) to 62(muted)) 229 * Sets left and right master volume (1(max) to 62(muted))
230 */ 230 */
231void audiohw_set_master_vol(int vol_l, int vol_r) 231void audiohw_set_master_vol(int vol_l, int vol_r)
232{ 232{
233 uda_regs[UDA_REG_ID_CTRL0] = (vol_l + vol_r) / 2; 233 uda_regs[UDA_REG_ID_CTRL0] = (vol_l + vol_r) / 2;
234 udacodec_write (UDA_REG_DATA0, UDA_DATA_CTRL0 | uda_regs[UDA_REG_ID_CTRL0]); 234 udacodec_write (UDA_REG_DATA0, UDA_DATA_CTRL0 | uda_regs[UDA_REG_ID_CTRL0]);
235} 235}
236 236
237void audiohw_set_frequency(int fsel) 237void audiohw_set_frequency(int fsel)
238{ 238{
239 if ((unsigned)fsel >= HW_NUM_FREQ) 239 if ((unsigned)fsel >= HW_NUM_FREQ)
240 fsel = HW_FREQ_DEFAULT; 240 fsel = HW_FREQ_DEFAULT;
241 241
242 uda_regs[UDA_REG_ID_STATUS_0] = I2S_IFMT_IIS | uda_freq_parms[fsel][1]; 242 uda_regs[UDA_REG_ID_STATUS_0] = I2S_IFMT_IIS | uda_freq_parms[fsel][1];
243 243
244 udacodec_write (UDA_REG_STATUS, UDA_STATUS_0 | uda_regs[UDA_REG_ID_STATUS_0]); 244 udacodec_write (UDA_REG_STATUS, UDA_STATUS_0 | uda_regs[UDA_REG_ID_STATUS_0]);
245} 245}