diff options
-rw-r--r-- | firmware/drivers/serial.c | 26 | ||||
-rw-r--r-- | firmware/export/config-h120.h | 3 | ||||
-rw-r--r-- | firmware/export/serial.h | 1 | ||||
-rw-r--r-- | firmware/logf.c | 5 | ||||
-rw-r--r-- | firmware/system.c | 22 |
5 files changed, 56 insertions, 1 deletions
diff --git a/firmware/drivers/serial.c b/firmware/drivers/serial.c index 46280bc8cc..5120161467 100644 --- a/firmware/drivers/serial.c +++ b/firmware/drivers/serial.c | |||
@@ -143,7 +143,31 @@ int remote_control_rx(void) | |||
143 | } | 143 | } |
144 | 144 | ||
145 | #endif /* HAVE_MMC */ | 145 | #endif /* HAVE_MMC */ |
146 | #else /* (CONFIG_CPU != MCF5249) && (CONFIG_CPU != TCC730) */ | 146 | #elif defined(CPU_COLDFIRE) && defined(HAVE_SERIAL) |
147 | |||
148 | void serial_tx(const unsigned char *buf) | ||
149 | { | ||
150 | while(*buf) { | ||
151 | while(!(USR0 & 0x04)) | ||
152 | { | ||
153 | }; | ||
154 | UTB0 = *buf++; | ||
155 | } | ||
156 | } | ||
157 | |||
158 | void serial_setup (void) | ||
159 | { | ||
160 | UCR0 = 0x30; /* Reset transmitter */ | ||
161 | UCSR0 = 0xdd; /* Timer mode */ | ||
162 | |||
163 | UCR0 = 0x10; /* Reset pointer */ | ||
164 | UMR0 = 0x13; /* No parity, 8 bits */ | ||
165 | UMR0 = 0x07; /* 1 stop bit */ | ||
166 | |||
167 | UCR0 = 0x04; /* Tx enable */ | ||
168 | } | ||
169 | |||
170 | #else /* Other targets */ | ||
147 | void serial_setup (void) | 171 | void serial_setup (void) |
148 | { | 172 | { |
149 | /* a dummy */ | 173 | /* a dummy */ |
diff --git a/firmware/export/config-h120.h b/firmware/export/config-h120.h index e6aa822376..d8038f21af 100644 --- a/firmware/export/config-h120.h +++ b/firmware/export/config-h120.h | |||
@@ -150,3 +150,6 @@ | |||
150 | 150 | ||
151 | /* Define this for FM radio input available */ | 151 | /* Define this for FM radio input available */ |
152 | #define HAVE_FMRADIO_IN | 152 | #define HAVE_FMRADIO_IN |
153 | |||
154 | /* Define this if you have a serial port */ | ||
155 | /*#define HAVE_SERIAL*/ | ||
diff --git a/firmware/export/serial.h b/firmware/export/serial.h index f2e5a945dd..add6cc8d99 100644 --- a/firmware/export/serial.h +++ b/firmware/export/serial.h | |||
@@ -22,5 +22,6 @@ | |||
22 | 22 | ||
23 | extern void serial_setup (void); | 23 | extern void serial_setup (void); |
24 | extern int remote_control_rx(void); | 24 | extern int remote_control_rx(void); |
25 | extern void serial_tx(const unsigned char *buf); | ||
25 | 26 | ||
26 | #endif | 27 | #endif |
diff --git a/firmware/logf.c b/firmware/logf.c index f61797b289..fc57bd85bf 100644 --- a/firmware/logf.c +++ b/firmware/logf.c | |||
@@ -31,6 +31,7 @@ | |||
31 | #include "config.h" | 31 | #include "config.h" |
32 | #include "lcd-remote.h" | 32 | #include "lcd-remote.h" |
33 | #include "logf.h" | 33 | #include "logf.h" |
34 | #include "serial.h" | ||
34 | 35 | ||
35 | /* Only provide all this if asked to */ | 36 | /* Only provide all this if asked to */ |
36 | #ifdef ROCKBOX_HAS_LOGF | 37 | #ifdef ROCKBOX_HAS_LOGF |
@@ -90,6 +91,10 @@ void logf(const char *format, ...) | |||
90 | } | 91 | } |
91 | ptr = logfbuffer[logfindex]; | 92 | ptr = logfbuffer[logfindex]; |
92 | len = vsnprintf(ptr, MAX_LOGF_ENTRY, format, ap); | 93 | len = vsnprintf(ptr, MAX_LOGF_ENTRY, format, ap); |
94 | #ifdef HAVE_SERIAL | ||
95 | serial_tx(ptr); | ||
96 | serial_tx("\r\n"); | ||
97 | #endif | ||
93 | va_end(ap); | 98 | va_end(ap); |
94 | if(len < MAX_LOGF_ENTRY) | 99 | if(len < MAX_LOGF_ENTRY) |
95 | /* pad with spaces up to the MAX_LOGF_ENTRY byte border */ | 100 | /* pad with spaces up to the MAX_LOGF_ENTRY byte border */ |
diff --git a/firmware/system.c b/firmware/system.c index 655b08d1bf..c597fc5995 100644 --- a/firmware/system.c +++ b/firmware/system.c | |||
@@ -685,6 +685,13 @@ int system_memory_guard(int newmode) | |||
685 | #define RECALC_DELAYS(f) | 685 | #define RECALC_DELAYS(f) |
686 | #endif | 686 | #endif |
687 | 687 | ||
688 | #ifdef HAVE_SERIAL | ||
689 | #define BAUD_RATE 57600 | ||
690 | #define BAUDRATE_DIV_DEFAULT (CPUFREQ_DEFAULT/(BAUD_RATE*32*2)) | ||
691 | #define BAUDRATE_DIV_NORMAL (CPUFREQ_NORMAL/(BAUD_RATE*32*2)) | ||
692 | #define BAUDRATE_DIV_MAX (CPUFREQ_MAX/(BAUD_RATE*32*2)) | ||
693 | #endif | ||
694 | |||
688 | void set_cpu_frequency (long) __attribute__ ((section (".icode"))); | 695 | void set_cpu_frequency (long) __attribute__ ((section (".icode"))); |
689 | void set_cpu_frequency(long frequency) | 696 | void set_cpu_frequency(long frequency) |
690 | { | 697 | { |
@@ -710,6 +717,11 @@ void set_cpu_frequency(long frequency) | |||
710 | IDECONFIG1 = 0x10100000 | (1 << 13) | (2 << 10); | 717 | IDECONFIG1 = 0x10100000 | (1 << 13) | (2 << 10); |
711 | /* SRE active on write (H300 USBOTG) | BUFEN2 enable | CS2Post | CS2Pre */ | 718 | /* SRE active on write (H300 USBOTG) | BUFEN2 enable | CS2Post | CS2Pre */ |
712 | IDECONFIG2 = 0x40000 | (2 << 8); /* TA enable + CS2wait */ | 719 | IDECONFIG2 = 0x40000 | (2 << 8); /* TA enable + CS2wait */ |
720 | |||
721 | #ifdef HAVE_SERIAL | ||
722 | UBG10 = BAUDRATE_DIV_MAX >> 8; | ||
723 | UBG20 = BAUDRATE_DIV_MAX & 0xff; | ||
724 | #endif | ||
713 | break; | 725 | break; |
714 | 726 | ||
715 | case CPUFREQ_NORMAL: | 727 | case CPUFREQ_NORMAL: |
@@ -732,6 +744,11 @@ void set_cpu_frequency(long frequency) | |||
732 | IDECONFIG1 = 0x10100000 | (0 << 13) | (1 << 10); | 744 | IDECONFIG1 = 0x10100000 | (0 << 13) | (1 << 10); |
733 | /* SRE active on write (H300 USBOTG) | BUFEN2 enable | CS2Post | CS2Pre */ | 745 | /* SRE active on write (H300 USBOTG) | BUFEN2 enable | CS2Post | CS2Pre */ |
734 | IDECONFIG2 = 0x40000 | (0 << 8); /* TA enable + CS2wait */ | 746 | IDECONFIG2 = 0x40000 | (0 << 8); /* TA enable + CS2wait */ |
747 | |||
748 | #ifdef HAVE_SERIAL | ||
749 | UBG10 = BAUDRATE_DIV_NORMAL >> 8; | ||
750 | UBG20 = BAUDRATE_DIV_NORMAL & 0xff; | ||
751 | #endif | ||
735 | break; | 752 | break; |
736 | default: | 753 | default: |
737 | DCR = (DCR & ~0x01ff) | DEFAULT_REFRESH_TIMER; | 754 | DCR = (DCR & ~0x01ff) | DEFAULT_REFRESH_TIMER; |
@@ -750,6 +767,11 @@ void set_cpu_frequency(long frequency) | |||
750 | IDECONFIG1 = 0x10100000 | (0 << 13) | (1 << 10); | 767 | IDECONFIG1 = 0x10100000 | (0 << 13) | (1 << 10); |
751 | /* SRE active on write (H300 USBOTG) | BUFEN2 enable | CS2Post | CS2Pre */ | 768 | /* SRE active on write (H300 USBOTG) | BUFEN2 enable | CS2Post | CS2Pre */ |
752 | IDECONFIG2 = 0x40000 | (0 << 8); /* TA enable + CS2wait */ | 769 | IDECONFIG2 = 0x40000 | (0 << 8); /* TA enable + CS2wait */ |
770 | |||
771 | #ifdef HAVE_SERIAL | ||
772 | UBG10 = BAUDRATE_DIV_DEFAULT >> 8; | ||
773 | UBG20 = BAUDRATE_DIV_DEFAULT & 0xff; | ||
774 | #endif | ||
753 | break; | 775 | break; |
754 | } | 776 | } |
755 | } | 777 | } |