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author | Igor Skochinsky <skochinsky@gmail.com> | 2017-04-03 15:13:46 +0200 |
---|---|---|
committer | Amaury Pouly <amaury.pouly@gmail.com> | 2017-04-25 11:24:24 +1000 |
commit | 03dd4b92be7dcd5c8ab06da3810887060e06abd5 (patch) | |
tree | d18b5e7748a08f75891e832e1687154490fd5b36 /utils/nwztools/database/nwz_db.c | |
parent | f1c8d63a762acdcb29f30d17617e531fdb555af4 (diff) | |
download | rockbox-03dd4b92be7dcd5c8ab06da3810887060e06abd5.tar.gz rockbox-03dd4b92be7dcd5c8ab06da3810887060e06abd5.zip |
nwztools/database: misc improvements
* make gen_db.py work on Windows/Python 2
- use hashlib module instead of md5sum, also don't rely on / for file path
matching
- don't use 'file' for a variable name
* fix parse_nvp_header.sh for older kernels
pre-emmc kernel sources use a slightly different #define format; adjust
regexp to catch it.
* add nwz-x1000 series NVP layout (from icx1087_nvp.h)
some new tags have no description, alas the driver doesn't have
them :/
* minor fixes to nvp/README
fixed typos/wording
Change-Id: I77d8c2704be2f2316e32aadcfd362df7102360d4
Diffstat (limited to 'utils/nwztools/database/nwz_db.c')
-rw-r--r-- | utils/nwztools/database/nwz_db.c | 188 |
1 files changed, 187 insertions, 1 deletions
diff --git a/utils/nwztools/database/nwz_db.c b/utils/nwztools/database/nwz_db.c index d5c226203b..e77b86e729 100644 --- a/utils/nwztools/database/nwz_db.c +++ b/utils/nwztools/database/nwz_db.c | |||
@@ -228,8 +228,11 @@ static int nvp_index_0ac81d[NWZ_NVP_COUNT] = | |||
228 | [NWZ_NVP_DBA] = 12, | 228 | [NWZ_NVP_DBA] = 12, |
229 | [NWZ_NVP_DBG] = 0, | 229 | [NWZ_NVP_DBG] = 0, |
230 | [NWZ_NVP_DBI] = NWZ_NVP_INVALID, | 230 | [NWZ_NVP_DBI] = NWZ_NVP_INVALID, |
231 | [NWZ_NVP_DBS] = NWZ_NVP_INVALID, | ||
231 | [NWZ_NVP_DBV] = 13, | 232 | [NWZ_NVP_DBV] = 13, |
232 | [NWZ_NVP_DCC] = 7, | 233 | [NWZ_NVP_DCC] = 7, |
234 | [NWZ_NVP_DG0] = NWZ_NVP_INVALID, | ||
235 | [NWZ_NVP_DG1] = NWZ_NVP_INVALID, | ||
233 | [NWZ_NVP_DOR] = 21, | 236 | [NWZ_NVP_DOR] = 21, |
234 | [NWZ_NVP_E00] = 36, | 237 | [NWZ_NVP_E00] = 36, |
235 | [NWZ_NVP_E01] = 37, | 238 | [NWZ_NVP_E01] = 37, |
@@ -264,6 +267,10 @@ static int nvp_index_0ac81d[NWZ_NVP_COUNT] = | |||
264 | [NWZ_NVP_E30] = 66, | 267 | [NWZ_NVP_E30] = 66, |
265 | [NWZ_NVP_E31] = 67, | 268 | [NWZ_NVP_E31] = 67, |
266 | [NWZ_NVP_EDW] = 22, | 269 | [NWZ_NVP_EDW] = 22, |
270 | [NWZ_NVP_EP0] = NWZ_NVP_INVALID, | ||
271 | [NWZ_NVP_EP1] = NWZ_NVP_INVALID, | ||
272 | [NWZ_NVP_EP2] = NWZ_NVP_INVALID, | ||
273 | [NWZ_NVP_EP3] = NWZ_NVP_INVALID, | ||
267 | [NWZ_NVP_ERI] = 6, | 274 | [NWZ_NVP_ERI] = 6, |
268 | [NWZ_NVP_EXM] = 25, | 275 | [NWZ_NVP_EXM] = 25, |
269 | [NWZ_NVP_FMP] = 82, | 276 | [NWZ_NVP_FMP] = 82, |
@@ -295,6 +302,7 @@ static int nvp_index_0ac81d[NWZ_NVP_COUNT] = | |||
295 | [NWZ_NVP_NVR] = NWZ_NVP_INVALID, | 302 | [NWZ_NVP_NVR] = NWZ_NVP_INVALID, |
296 | [NWZ_NVP_PCD] = 26, | 303 | [NWZ_NVP_PCD] = 26, |
297 | [NWZ_NVP_PCI] = NWZ_NVP_INVALID, | 304 | [NWZ_NVP_PCI] = NWZ_NVP_INVALID, |
305 | [NWZ_NVP_PNC] = NWZ_NVP_INVALID, | ||
298 | [NWZ_NVP_PRK] = NWZ_NVP_INVALID, | 306 | [NWZ_NVP_PRK] = NWZ_NVP_INVALID, |
299 | [NWZ_NVP_PSK] = NWZ_NVP_INVALID, | 307 | [NWZ_NVP_PSK] = NWZ_NVP_INVALID, |
300 | [NWZ_NVP_PTS] = 75, | 308 | [NWZ_NVP_PTS] = 75, |
@@ -321,6 +329,7 @@ static int nvp_index_0ac81d[NWZ_NVP_COUNT] = | |||
321 | [NWZ_NVP_UFN] = 29, | 329 | [NWZ_NVP_UFN] = 29, |
322 | [NWZ_NVP_UMS] = NWZ_NVP_INVALID, | 330 | [NWZ_NVP_UMS] = NWZ_NVP_INVALID, |
323 | [NWZ_NVP_UPS] = NWZ_NVP_INVALID, | 331 | [NWZ_NVP_UPS] = NWZ_NVP_INVALID, |
332 | [NWZ_NVP_VAR] = NWZ_NVP_INVALID, | ||
324 | [NWZ_NVP_VRT] = NWZ_NVP_INVALID, | 333 | [NWZ_NVP_VRT] = NWZ_NVP_INVALID, |
325 | }; | 334 | }; |
326 | 335 | ||
@@ -342,8 +351,11 @@ static int nvp_index_28dc2c[NWZ_NVP_COUNT] = | |||
342 | [NWZ_NVP_DBA] = 24, | 351 | [NWZ_NVP_DBA] = 24, |
343 | [NWZ_NVP_DBG] = 0, | 352 | [NWZ_NVP_DBG] = 0, |
344 | [NWZ_NVP_DBI] = NWZ_NVP_INVALID, | 353 | [NWZ_NVP_DBI] = NWZ_NVP_INVALID, |
354 | [NWZ_NVP_DBS] = NWZ_NVP_INVALID, | ||
345 | [NWZ_NVP_DBV] = 25, | 355 | [NWZ_NVP_DBV] = 25, |
346 | [NWZ_NVP_DCC] = 31, | 356 | [NWZ_NVP_DCC] = 31, |
357 | [NWZ_NVP_DG0] = NWZ_NVP_INVALID, | ||
358 | [NWZ_NVP_DG1] = NWZ_NVP_INVALID, | ||
347 | [NWZ_NVP_DOR] = 26, | 359 | [NWZ_NVP_DOR] = 26, |
348 | [NWZ_NVP_E00] = 36, | 360 | [NWZ_NVP_E00] = 36, |
349 | [NWZ_NVP_E01] = 37, | 361 | [NWZ_NVP_E01] = 37, |
@@ -378,6 +390,10 @@ static int nvp_index_28dc2c[NWZ_NVP_COUNT] = | |||
378 | [NWZ_NVP_E30] = 66, | 390 | [NWZ_NVP_E30] = 66, |
379 | [NWZ_NVP_E31] = 67, | 391 | [NWZ_NVP_E31] = 67, |
380 | [NWZ_NVP_EDW] = 71, | 392 | [NWZ_NVP_EDW] = 71, |
393 | [NWZ_NVP_EP0] = NWZ_NVP_INVALID, | ||
394 | [NWZ_NVP_EP1] = NWZ_NVP_INVALID, | ||
395 | [NWZ_NVP_EP2] = NWZ_NVP_INVALID, | ||
396 | [NWZ_NVP_EP3] = NWZ_NVP_INVALID, | ||
381 | [NWZ_NVP_ERI] = 76, | 397 | [NWZ_NVP_ERI] = 76, |
382 | [NWZ_NVP_EXM] = NWZ_NVP_INVALID, | 398 | [NWZ_NVP_EXM] = NWZ_NVP_INVALID, |
383 | [NWZ_NVP_FMP] = 15, | 399 | [NWZ_NVP_FMP] = 15, |
@@ -409,6 +425,7 @@ static int nvp_index_28dc2c[NWZ_NVP_COUNT] = | |||
409 | [NWZ_NVP_NVR] = NWZ_NVP_INVALID, | 425 | [NWZ_NVP_NVR] = NWZ_NVP_INVALID, |
410 | [NWZ_NVP_PCD] = 8, | 426 | [NWZ_NVP_PCD] = 8, |
411 | [NWZ_NVP_PCI] = NWZ_NVP_INVALID, | 427 | [NWZ_NVP_PCI] = NWZ_NVP_INVALID, |
428 | [NWZ_NVP_PNC] = NWZ_NVP_INVALID, | ||
412 | [NWZ_NVP_PRK] = NWZ_NVP_INVALID, | 429 | [NWZ_NVP_PRK] = NWZ_NVP_INVALID, |
413 | [NWZ_NVP_PSK] = 18, | 430 | [NWZ_NVP_PSK] = 18, |
414 | [NWZ_NVP_PTS] = 77, | 431 | [NWZ_NVP_PTS] = 77, |
@@ -435,6 +452,7 @@ static int nvp_index_28dc2c[NWZ_NVP_COUNT] = | |||
435 | [NWZ_NVP_UFN] = 10, | 452 | [NWZ_NVP_UFN] = 10, |
436 | [NWZ_NVP_UMS] = NWZ_NVP_INVALID, | 453 | [NWZ_NVP_UMS] = NWZ_NVP_INVALID, |
437 | [NWZ_NVP_UPS] = NWZ_NVP_INVALID, | 454 | [NWZ_NVP_UPS] = NWZ_NVP_INVALID, |
455 | [NWZ_NVP_VAR] = NWZ_NVP_INVALID, | ||
438 | [NWZ_NVP_VRT] = 81, | 456 | [NWZ_NVP_VRT] = 81, |
439 | }; | 457 | }; |
440 | 458 | ||
@@ -456,8 +474,11 @@ static int nvp_index_398250[NWZ_NVP_COUNT] = | |||
456 | [NWZ_NVP_DBA] = NWZ_NVP_INVALID, | 474 | [NWZ_NVP_DBA] = NWZ_NVP_INVALID, |
457 | [NWZ_NVP_DBG] = 0, | 475 | [NWZ_NVP_DBG] = 0, |
458 | [NWZ_NVP_DBI] = 88, | 476 | [NWZ_NVP_DBI] = 88, |
477 | [NWZ_NVP_DBS] = NWZ_NVP_INVALID, | ||
459 | [NWZ_NVP_DBV] = 25, | 478 | [NWZ_NVP_DBV] = 25, |
460 | [NWZ_NVP_DCC] = NWZ_NVP_INVALID, | 479 | [NWZ_NVP_DCC] = NWZ_NVP_INVALID, |
480 | [NWZ_NVP_DG0] = NWZ_NVP_INVALID, | ||
481 | [NWZ_NVP_DG1] = NWZ_NVP_INVALID, | ||
461 | [NWZ_NVP_DOR] = NWZ_NVP_INVALID, | 482 | [NWZ_NVP_DOR] = NWZ_NVP_INVALID, |
462 | [NWZ_NVP_E00] = 36, | 483 | [NWZ_NVP_E00] = 36, |
463 | [NWZ_NVP_E01] = 37, | 484 | [NWZ_NVP_E01] = 37, |
@@ -492,6 +513,10 @@ static int nvp_index_398250[NWZ_NVP_COUNT] = | |||
492 | [NWZ_NVP_E30] = 66, | 513 | [NWZ_NVP_E30] = 66, |
493 | [NWZ_NVP_E31] = 67, | 514 | [NWZ_NVP_E31] = 67, |
494 | [NWZ_NVP_EDW] = 71, | 515 | [NWZ_NVP_EDW] = 71, |
516 | [NWZ_NVP_EP0] = NWZ_NVP_INVALID, | ||
517 | [NWZ_NVP_EP1] = NWZ_NVP_INVALID, | ||
518 | [NWZ_NVP_EP2] = NWZ_NVP_INVALID, | ||
519 | [NWZ_NVP_EP3] = NWZ_NVP_INVALID, | ||
495 | [NWZ_NVP_ERI] = 76, | 520 | [NWZ_NVP_ERI] = 76, |
496 | [NWZ_NVP_EXM] = NWZ_NVP_INVALID, | 521 | [NWZ_NVP_EXM] = NWZ_NVP_INVALID, |
497 | [NWZ_NVP_FMP] = 15, | 522 | [NWZ_NVP_FMP] = 15, |
@@ -523,6 +548,7 @@ static int nvp_index_398250[NWZ_NVP_COUNT] = | |||
523 | [NWZ_NVP_NVR] = 77, | 548 | [NWZ_NVP_NVR] = 77, |
524 | [NWZ_NVP_PCD] = 8, | 549 | [NWZ_NVP_PCD] = 8, |
525 | [NWZ_NVP_PCI] = 87, | 550 | [NWZ_NVP_PCI] = 87, |
551 | [NWZ_NVP_PNC] = NWZ_NVP_INVALID, | ||
526 | [NWZ_NVP_PRK] = 4, | 552 | [NWZ_NVP_PRK] = 4, |
527 | [NWZ_NVP_PSK] = 18, | 553 | [NWZ_NVP_PSK] = 18, |
528 | [NWZ_NVP_PTS] = NWZ_NVP_INVALID, | 554 | [NWZ_NVP_PTS] = NWZ_NVP_INVALID, |
@@ -549,9 +575,133 @@ static int nvp_index_398250[NWZ_NVP_COUNT] = | |||
549 | [NWZ_NVP_UFN] = 10, | 575 | [NWZ_NVP_UFN] = 10, |
550 | [NWZ_NVP_UMS] = 27, | 576 | [NWZ_NVP_UMS] = 27, |
551 | [NWZ_NVP_UPS] = 29, | 577 | [NWZ_NVP_UPS] = 29, |
578 | [NWZ_NVP_VAR] = NWZ_NVP_INVALID, | ||
552 | [NWZ_NVP_VRT] = 81, | 579 | [NWZ_NVP_VRT] = 81, |
553 | }; | 580 | }; |
554 | 581 | ||
582 | static int nvp_index_4edba7[NWZ_NVP_COUNT] = | ||
583 | { | ||
584 | [NWZ_NVP_APD] = 78, | ||
585 | [NWZ_NVP_APP] = 0, | ||
586 | [NWZ_NVP_BFD] = NWZ_NVP_INVALID, | ||
587 | [NWZ_NVP_BFP] = NWZ_NVP_INVALID, | ||
588 | [NWZ_NVP_BLF] = 79, | ||
589 | [NWZ_NVP_BML] = NWZ_NVP_INVALID, | ||
590 | [NWZ_NVP_BOK] = 10, | ||
591 | [NWZ_NVP_BPR] = 35, | ||
592 | [NWZ_NVP_BTC] = NWZ_NVP_INVALID, | ||
593 | [NWZ_NVP_BTI] = 1, | ||
594 | [NWZ_NVP_CLV] = 68, | ||
595 | [NWZ_NVP_CNG] = 3, | ||
596 | [NWZ_NVP_CTR] = NWZ_NVP_INVALID, | ||
597 | [NWZ_NVP_DBA] = 12, | ||
598 | [NWZ_NVP_DBG] = NWZ_NVP_INVALID, | ||
599 | [NWZ_NVP_DBI] = NWZ_NVP_INVALID, | ||
600 | [NWZ_NVP_DBS] = 27, | ||
601 | [NWZ_NVP_DBV] = 13, | ||
602 | [NWZ_NVP_DCC] = 7, | ||
603 | [NWZ_NVP_DG0] = 5, | ||
604 | [NWZ_NVP_DG1] = 6, | ||
605 | [NWZ_NVP_DOR] = 21, | ||
606 | [NWZ_NVP_E00] = 36, | ||
607 | [NWZ_NVP_E01] = 37, | ||
608 | [NWZ_NVP_E02] = 38, | ||
609 | [NWZ_NVP_E03] = 39, | ||
610 | [NWZ_NVP_E04] = 40, | ||
611 | [NWZ_NVP_E05] = 41, | ||
612 | [NWZ_NVP_E06] = 42, | ||
613 | [NWZ_NVP_E07] = 43, | ||
614 | [NWZ_NVP_E08] = 44, | ||
615 | [NWZ_NVP_E09] = 45, | ||
616 | [NWZ_NVP_E10] = 46, | ||
617 | [NWZ_NVP_E11] = 47, | ||
618 | [NWZ_NVP_E12] = 48, | ||
619 | [NWZ_NVP_E13] = 49, | ||
620 | [NWZ_NVP_E14] = 50, | ||
621 | [NWZ_NVP_E15] = 51, | ||
622 | [NWZ_NVP_E16] = 52, | ||
623 | [NWZ_NVP_E17] = 53, | ||
624 | [NWZ_NVP_E18] = 54, | ||
625 | [NWZ_NVP_E19] = 55, | ||
626 | [NWZ_NVP_E20] = 56, | ||
627 | [NWZ_NVP_E21] = 57, | ||
628 | [NWZ_NVP_E22] = 58, | ||
629 | [NWZ_NVP_E23] = 59, | ||
630 | [NWZ_NVP_E24] = 60, | ||
631 | [NWZ_NVP_E25] = 61, | ||
632 | [NWZ_NVP_E26] = 62, | ||
633 | [NWZ_NVP_E27] = 63, | ||
634 | [NWZ_NVP_E28] = 64, | ||
635 | [NWZ_NVP_E29] = 65, | ||
636 | [NWZ_NVP_E30] = 66, | ||
637 | [NWZ_NVP_E31] = 67, | ||
638 | [NWZ_NVP_EDW] = 22, | ||
639 | [NWZ_NVP_EP0] = 71, | ||
640 | [NWZ_NVP_EP1] = 72, | ||
641 | [NWZ_NVP_EP2] = 73, | ||
642 | [NWZ_NVP_EP3] = 74, | ||
643 | [NWZ_NVP_ERI] = NWZ_NVP_INVALID, | ||
644 | [NWZ_NVP_EXM] = NWZ_NVP_INVALID, | ||
645 | [NWZ_NVP_FMP] = NWZ_NVP_INVALID, | ||
646 | [NWZ_NVP_FNI] = NWZ_NVP_INVALID, | ||
647 | [NWZ_NVP_FPI] = NWZ_NVP_INVALID, | ||
648 | [NWZ_NVP_FUI] = 19, | ||
649 | [NWZ_NVP_FUP] = 9, | ||
650 | [NWZ_NVP_FUR] = NWZ_NVP_INVALID, | ||
651 | [NWZ_NVP_FVI] = NWZ_NVP_INVALID, | ||
652 | [NWZ_NVP_GTY] = 18, | ||
653 | [NWZ_NVP_HDI] = 2, | ||
654 | [NWZ_NVP_HLD] = 80, | ||
655 | [NWZ_NVP_INS] = NWZ_NVP_INVALID, | ||
656 | [NWZ_NVP_IPT] = 70, | ||
657 | [NWZ_NVP_KAS] = 32, | ||
658 | [NWZ_NVP_LBI] = 20, | ||
659 | [NWZ_NVP_LYR] = NWZ_NVP_INVALID, | ||
660 | [NWZ_NVP_MAC] = 77, | ||
661 | [NWZ_NVP_MCR] = NWZ_NVP_INVALID, | ||
662 | [NWZ_NVP_MDK] = NWZ_NVP_INVALID, | ||
663 | [NWZ_NVP_MDL] = 8, | ||
664 | [NWZ_NVP_MID] = 16, | ||
665 | [NWZ_NVP_MLK] = NWZ_NVP_INVALID, | ||
666 | [NWZ_NVP_MSC] = NWZ_NVP_INVALID, | ||
667 | [NWZ_NVP_MSO] = NWZ_NVP_INVALID, | ||
668 | [NWZ_NVP_MTM] = NWZ_NVP_INVALID, | ||
669 | [NWZ_NVP_MUK] = NWZ_NVP_INVALID, | ||
670 | [NWZ_NVP_NCP] = 31, | ||
671 | [NWZ_NVP_NVR] = NWZ_NVP_INVALID, | ||
672 | [NWZ_NVP_PCD] = 26, | ||
673 | [NWZ_NVP_PCI] = NWZ_NVP_INVALID, | ||
674 | [NWZ_NVP_PNC] = 33, | ||
675 | [NWZ_NVP_PRK] = NWZ_NVP_INVALID, | ||
676 | [NWZ_NVP_PSK] = NWZ_NVP_INVALID, | ||
677 | [NWZ_NVP_PTS] = 75, | ||
678 | [NWZ_NVP_RBT] = NWZ_NVP_INVALID, | ||
679 | [NWZ_NVP_RND] = 28, | ||
680 | [NWZ_NVP_RTC] = 34, | ||
681 | [NWZ_NVP_SDC] = NWZ_NVP_INVALID, | ||
682 | [NWZ_NVP_SDP] = 30, | ||
683 | [NWZ_NVP_SER] = 4, | ||
684 | [NWZ_NVP_SFI] = NWZ_NVP_INVALID, | ||
685 | [NWZ_NVP_SHE] = NWZ_NVP_INVALID, | ||
686 | [NWZ_NVP_SHP] = 11, | ||
687 | [NWZ_NVP_SID] = NWZ_NVP_INVALID, | ||
688 | [NWZ_NVP_SKD] = 81, | ||
689 | [NWZ_NVP_SKT] = 76, | ||
690 | [NWZ_NVP_SKU] = NWZ_NVP_INVALID, | ||
691 | [NWZ_NVP_SLP] = 69, | ||
692 | [NWZ_NVP_SPS] = NWZ_NVP_INVALID, | ||
693 | [NWZ_NVP_SYI] = 24, | ||
694 | [NWZ_NVP_TR0] = 14, | ||
695 | [NWZ_NVP_TR1] = 15, | ||
696 | [NWZ_NVP_TST] = 17, | ||
697 | [NWZ_NVP_UBP] = 23, | ||
698 | [NWZ_NVP_UFN] = 29, | ||
699 | [NWZ_NVP_UMS] = NWZ_NVP_INVALID, | ||
700 | [NWZ_NVP_UPS] = NWZ_NVP_INVALID, | ||
701 | [NWZ_NVP_VAR] = 25, | ||
702 | [NWZ_NVP_VRT] = NWZ_NVP_INVALID, | ||
703 | }; | ||
704 | |||
555 | static int nvp_index_6485c8[NWZ_NVP_COUNT] = | 705 | static int nvp_index_6485c8[NWZ_NVP_COUNT] = |
556 | { | 706 | { |
557 | [NWZ_NVP_APD] = 78, | 707 | [NWZ_NVP_APD] = 78, |
@@ -570,8 +720,11 @@ static int nvp_index_6485c8[NWZ_NVP_COUNT] = | |||
570 | [NWZ_NVP_DBA] = 24, | 720 | [NWZ_NVP_DBA] = 24, |
571 | [NWZ_NVP_DBG] = 0, | 721 | [NWZ_NVP_DBG] = 0, |
572 | [NWZ_NVP_DBI] = 88, | 722 | [NWZ_NVP_DBI] = 88, |
723 | [NWZ_NVP_DBS] = NWZ_NVP_INVALID, | ||
573 | [NWZ_NVP_DBV] = 25, | 724 | [NWZ_NVP_DBV] = 25, |
574 | [NWZ_NVP_DCC] = 31, | 725 | [NWZ_NVP_DCC] = 31, |
726 | [NWZ_NVP_DG0] = NWZ_NVP_INVALID, | ||
727 | [NWZ_NVP_DG1] = NWZ_NVP_INVALID, | ||
575 | [NWZ_NVP_DOR] = 26, | 728 | [NWZ_NVP_DOR] = 26, |
576 | [NWZ_NVP_E00] = 36, | 729 | [NWZ_NVP_E00] = 36, |
577 | [NWZ_NVP_E01] = 37, | 730 | [NWZ_NVP_E01] = 37, |
@@ -606,6 +759,10 @@ static int nvp_index_6485c8[NWZ_NVP_COUNT] = | |||
606 | [NWZ_NVP_E30] = 66, | 759 | [NWZ_NVP_E30] = 66, |
607 | [NWZ_NVP_E31] = 67, | 760 | [NWZ_NVP_E31] = 67, |
608 | [NWZ_NVP_EDW] = 71, | 761 | [NWZ_NVP_EDW] = 71, |
762 | [NWZ_NVP_EP0] = NWZ_NVP_INVALID, | ||
763 | [NWZ_NVP_EP1] = NWZ_NVP_INVALID, | ||
764 | [NWZ_NVP_EP2] = NWZ_NVP_INVALID, | ||
765 | [NWZ_NVP_EP3] = NWZ_NVP_INVALID, | ||
609 | [NWZ_NVP_ERI] = 76, | 766 | [NWZ_NVP_ERI] = 76, |
610 | [NWZ_NVP_EXM] = NWZ_NVP_INVALID, | 767 | [NWZ_NVP_EXM] = NWZ_NVP_INVALID, |
611 | [NWZ_NVP_FMP] = 15, | 768 | [NWZ_NVP_FMP] = 15, |
@@ -637,6 +794,7 @@ static int nvp_index_6485c8[NWZ_NVP_COUNT] = | |||
637 | [NWZ_NVP_NVR] = NWZ_NVP_INVALID, | 794 | [NWZ_NVP_NVR] = NWZ_NVP_INVALID, |
638 | [NWZ_NVP_PCD] = 8, | 795 | [NWZ_NVP_PCD] = 8, |
639 | [NWZ_NVP_PCI] = 87, | 796 | [NWZ_NVP_PCI] = 87, |
797 | [NWZ_NVP_PNC] = NWZ_NVP_INVALID, | ||
640 | [NWZ_NVP_PRK] = NWZ_NVP_INVALID, | 798 | [NWZ_NVP_PRK] = NWZ_NVP_INVALID, |
641 | [NWZ_NVP_PSK] = 18, | 799 | [NWZ_NVP_PSK] = 18, |
642 | [NWZ_NVP_PTS] = 77, | 800 | [NWZ_NVP_PTS] = 77, |
@@ -663,6 +821,7 @@ static int nvp_index_6485c8[NWZ_NVP_COUNT] = | |||
663 | [NWZ_NVP_UFN] = 10, | 821 | [NWZ_NVP_UFN] = 10, |
664 | [NWZ_NVP_UMS] = NWZ_NVP_INVALID, | 822 | [NWZ_NVP_UMS] = NWZ_NVP_INVALID, |
665 | [NWZ_NVP_UPS] = NWZ_NVP_INVALID, | 823 | [NWZ_NVP_UPS] = NWZ_NVP_INVALID, |
824 | [NWZ_NVP_VAR] = NWZ_NVP_INVALID, | ||
666 | [NWZ_NVP_VRT] = 81, | 825 | [NWZ_NVP_VRT] = 81, |
667 | }; | 826 | }; |
668 | 827 | ||
@@ -684,8 +843,11 @@ static int nvp_index_92faee[NWZ_NVP_COUNT] = | |||
684 | [NWZ_NVP_DBA] = 24, | 843 | [NWZ_NVP_DBA] = 24, |
685 | [NWZ_NVP_DBG] = 0, | 844 | [NWZ_NVP_DBG] = 0, |
686 | [NWZ_NVP_DBI] = 88, | 845 | [NWZ_NVP_DBI] = 88, |
846 | [NWZ_NVP_DBS] = NWZ_NVP_INVALID, | ||
687 | [NWZ_NVP_DBV] = 25, | 847 | [NWZ_NVP_DBV] = 25, |
688 | [NWZ_NVP_DCC] = 31, | 848 | [NWZ_NVP_DCC] = 31, |
849 | [NWZ_NVP_DG0] = NWZ_NVP_INVALID, | ||
850 | [NWZ_NVP_DG1] = NWZ_NVP_INVALID, | ||
689 | [NWZ_NVP_DOR] = 26, | 851 | [NWZ_NVP_DOR] = 26, |
690 | [NWZ_NVP_E00] = 36, | 852 | [NWZ_NVP_E00] = 36, |
691 | [NWZ_NVP_E01] = 37, | 853 | [NWZ_NVP_E01] = 37, |
@@ -720,6 +882,10 @@ static int nvp_index_92faee[NWZ_NVP_COUNT] = | |||
720 | [NWZ_NVP_E30] = 66, | 882 | [NWZ_NVP_E30] = 66, |
721 | [NWZ_NVP_E31] = 67, | 883 | [NWZ_NVP_E31] = 67, |
722 | [NWZ_NVP_EDW] = 71, | 884 | [NWZ_NVP_EDW] = 71, |
885 | [NWZ_NVP_EP0] = NWZ_NVP_INVALID, | ||
886 | [NWZ_NVP_EP1] = NWZ_NVP_INVALID, | ||
887 | [NWZ_NVP_EP2] = NWZ_NVP_INVALID, | ||
888 | [NWZ_NVP_EP3] = NWZ_NVP_INVALID, | ||
723 | [NWZ_NVP_ERI] = 76, | 889 | [NWZ_NVP_ERI] = 76, |
724 | [NWZ_NVP_EXM] = NWZ_NVP_INVALID, | 890 | [NWZ_NVP_EXM] = NWZ_NVP_INVALID, |
725 | [NWZ_NVP_FMP] = 15, | 891 | [NWZ_NVP_FMP] = 15, |
@@ -751,6 +917,7 @@ static int nvp_index_92faee[NWZ_NVP_COUNT] = | |||
751 | [NWZ_NVP_NVR] = NWZ_NVP_INVALID, | 917 | [NWZ_NVP_NVR] = NWZ_NVP_INVALID, |
752 | [NWZ_NVP_PCD] = 8, | 918 | [NWZ_NVP_PCD] = 8, |
753 | [NWZ_NVP_PCI] = 87, | 919 | [NWZ_NVP_PCI] = 87, |
920 | [NWZ_NVP_PNC] = NWZ_NVP_INVALID, | ||
754 | [NWZ_NVP_PRK] = NWZ_NVP_INVALID, | 921 | [NWZ_NVP_PRK] = NWZ_NVP_INVALID, |
755 | [NWZ_NVP_PSK] = 18, | 922 | [NWZ_NVP_PSK] = 18, |
756 | [NWZ_NVP_PTS] = 77, | 923 | [NWZ_NVP_PTS] = 77, |
@@ -777,6 +944,7 @@ static int nvp_index_92faee[NWZ_NVP_COUNT] = | |||
777 | [NWZ_NVP_UFN] = 10, | 944 | [NWZ_NVP_UFN] = 10, |
778 | [NWZ_NVP_UMS] = NWZ_NVP_INVALID, | 945 | [NWZ_NVP_UMS] = NWZ_NVP_INVALID, |
779 | [NWZ_NVP_UPS] = NWZ_NVP_INVALID, | 946 | [NWZ_NVP_UPS] = NWZ_NVP_INVALID, |
947 | [NWZ_NVP_VAR] = NWZ_NVP_INVALID, | ||
780 | [NWZ_NVP_VRT] = 81, | 948 | [NWZ_NVP_VRT] = 81, |
781 | }; | 949 | }; |
782 | 950 | ||
@@ -798,8 +966,11 @@ static int nvp_index_f505c8[NWZ_NVP_COUNT] = | |||
798 | [NWZ_NVP_DBA] = 12, | 966 | [NWZ_NVP_DBA] = 12, |
799 | [NWZ_NVP_DBG] = 0, | 967 | [NWZ_NVP_DBG] = 0, |
800 | [NWZ_NVP_DBI] = NWZ_NVP_INVALID, | 968 | [NWZ_NVP_DBI] = NWZ_NVP_INVALID, |
969 | [NWZ_NVP_DBS] = NWZ_NVP_INVALID, | ||
801 | [NWZ_NVP_DBV] = 13, | 970 | [NWZ_NVP_DBV] = 13, |
802 | [NWZ_NVP_DCC] = 7, | 971 | [NWZ_NVP_DCC] = 7, |
972 | [NWZ_NVP_DG0] = NWZ_NVP_INVALID, | ||
973 | [NWZ_NVP_DG1] = NWZ_NVP_INVALID, | ||
803 | [NWZ_NVP_DOR] = 21, | 974 | [NWZ_NVP_DOR] = 21, |
804 | [NWZ_NVP_E00] = 36, | 975 | [NWZ_NVP_E00] = 36, |
805 | [NWZ_NVP_E01] = 37, | 976 | [NWZ_NVP_E01] = 37, |
@@ -834,6 +1005,10 @@ static int nvp_index_f505c8[NWZ_NVP_COUNT] = | |||
834 | [NWZ_NVP_E30] = 66, | 1005 | [NWZ_NVP_E30] = 66, |
835 | [NWZ_NVP_E31] = 67, | 1006 | [NWZ_NVP_E31] = 67, |
836 | [NWZ_NVP_EDW] = 22, | 1007 | [NWZ_NVP_EDW] = 22, |
1008 | [NWZ_NVP_EP0] = NWZ_NVP_INVALID, | ||
1009 | [NWZ_NVP_EP1] = NWZ_NVP_INVALID, | ||
1010 | [NWZ_NVP_EP2] = NWZ_NVP_INVALID, | ||
1011 | [NWZ_NVP_EP3] = NWZ_NVP_INVALID, | ||
837 | [NWZ_NVP_ERI] = 6, | 1012 | [NWZ_NVP_ERI] = 6, |
838 | [NWZ_NVP_EXM] = 25, | 1013 | [NWZ_NVP_EXM] = 25, |
839 | [NWZ_NVP_FMP] = 82, | 1014 | [NWZ_NVP_FMP] = 82, |
@@ -865,6 +1040,7 @@ static int nvp_index_f505c8[NWZ_NVP_COUNT] = | |||
865 | [NWZ_NVP_NVR] = NWZ_NVP_INVALID, | 1040 | [NWZ_NVP_NVR] = NWZ_NVP_INVALID, |
866 | [NWZ_NVP_PCD] = 26, | 1041 | [NWZ_NVP_PCD] = 26, |
867 | [NWZ_NVP_PCI] = NWZ_NVP_INVALID, | 1042 | [NWZ_NVP_PCI] = NWZ_NVP_INVALID, |
1043 | [NWZ_NVP_PNC] = NWZ_NVP_INVALID, | ||
868 | [NWZ_NVP_PRK] = NWZ_NVP_INVALID, | 1044 | [NWZ_NVP_PRK] = NWZ_NVP_INVALID, |
869 | [NWZ_NVP_PSK] = 86, | 1045 | [NWZ_NVP_PSK] = 86, |
870 | [NWZ_NVP_PTS] = 75, | 1046 | [NWZ_NVP_PTS] = 75, |
@@ -891,6 +1067,7 @@ static int nvp_index_f505c8[NWZ_NVP_COUNT] = | |||
891 | [NWZ_NVP_UFN] = 29, | 1067 | [NWZ_NVP_UFN] = 29, |
892 | [NWZ_NVP_UMS] = NWZ_NVP_INVALID, | 1068 | [NWZ_NVP_UMS] = NWZ_NVP_INVALID, |
893 | [NWZ_NVP_UPS] = NWZ_NVP_INVALID, | 1069 | [NWZ_NVP_UPS] = NWZ_NVP_INVALID, |
1070 | [NWZ_NVP_VAR] = NWZ_NVP_INVALID, | ||
894 | [NWZ_NVP_VRT] = 85, | 1071 | [NWZ_NVP_VRT] = 85, |
895 | }; | 1072 | }; |
896 | 1073 | ||
@@ -912,8 +1089,11 @@ struct nwz_nvp_info_t nwz_nvp[NWZ_NVP_COUNT] = | |||
912 | [NWZ_NVP_DBA] = { "dba", 160, "aad icv" }, | 1089 | [NWZ_NVP_DBA] = { "dba", 160, "aad icv" }, |
913 | [NWZ_NVP_DBG] = { "dbg", 0, "" }, | 1090 | [NWZ_NVP_DBG] = { "dbg", 0, "" }, |
914 | [NWZ_NVP_DBI] = { "dbi", 262144, "dead battery image" }, | 1091 | [NWZ_NVP_DBI] = { "dbi", 262144, "dead battery image" }, |
1092 | [NWZ_NVP_DBS] = { "dbs", 0, "" }, | ||
915 | [NWZ_NVP_DBV] = { "dbv", 520, "empr icv | empr key" }, | 1093 | [NWZ_NVP_DBV] = { "dbv", 520, "empr icv | empr key" }, |
916 | [NWZ_NVP_DCC] = { "dcc", 20, "secure clock" }, | 1094 | [NWZ_NVP_DCC] = { "dcc", 20, "secure clock" }, |
1095 | [NWZ_NVP_DG0] = { "dg0", 0, "" }, | ||
1096 | [NWZ_NVP_DG1] = { "dg1", 0, "" }, | ||
917 | [NWZ_NVP_DOR] = { "dor", 4, "key mode (debug/release)" }, | 1097 | [NWZ_NVP_DOR] = { "dor", 4, "key mode (debug/release)" }, |
918 | [NWZ_NVP_E00] = { "e00", 1024, "EMPR 0" }, | 1098 | [NWZ_NVP_E00] = { "e00", 1024, "EMPR 0" }, |
919 | [NWZ_NVP_E01] = { "e01", 1024, "EMPR 1" }, | 1099 | [NWZ_NVP_E01] = { "e01", 1024, "EMPR 1" }, |
@@ -948,6 +1128,10 @@ struct nwz_nvp_info_t nwz_nvp[NWZ_NVP_COUNT] = | |||
948 | [NWZ_NVP_E30] = { "e30", 1024, "EMPR 30" }, | 1128 | [NWZ_NVP_E30] = { "e30", 1024, "EMPR 30" }, |
949 | [NWZ_NVP_E31] = { "e31", 1024, "EMPR 31" }, | 1129 | [NWZ_NVP_E31] = { "e31", 1024, "EMPR 31" }, |
950 | [NWZ_NVP_EDW] = { "edw", 4, "quick shutdown flag" }, | 1130 | [NWZ_NVP_EDW] = { "edw", 4, "quick shutdown flag" }, |
1131 | [NWZ_NVP_EP0] = { "ep0", 0, "" }, | ||
1132 | [NWZ_NVP_EP1] = { "ep1", 0, "" }, | ||
1133 | [NWZ_NVP_EP2] = { "ep2", 0, "" }, | ||
1134 | [NWZ_NVP_EP3] = { "ep3", 0, "" }, | ||
951 | [NWZ_NVP_ERI] = { "eri", 262144, "update error image" }, | 1135 | [NWZ_NVP_ERI] = { "eri", 262144, "update error image" }, |
952 | [NWZ_NVP_EXM] = { "exm", 4, "exception monitor mode" }, | 1136 | [NWZ_NVP_EXM] = { "exm", 4, "exception monitor mode" }, |
953 | [NWZ_NVP_FMP] = { "fmp", 16, "fm parameter" }, | 1137 | [NWZ_NVP_FMP] = { "fmp", 16, "fm parameter" }, |
@@ -979,6 +1163,7 @@ struct nwz_nvp_info_t nwz_nvp[NWZ_NVP_COUNT] = | |||
979 | [NWZ_NVP_NVR] = { "nvr", 0, "" }, | 1163 | [NWZ_NVP_NVR] = { "nvr", 0, "" }, |
980 | [NWZ_NVP_PCD] = { "pcd", 5, "product code" }, | 1164 | [NWZ_NVP_PCD] = { "pcd", 5, "product code" }, |
981 | [NWZ_NVP_PCI] = { "pci", 262144, "precharge image" }, | 1165 | [NWZ_NVP_PCI] = { "pci", 262144, "precharge image" }, |
1166 | [NWZ_NVP_PNC] = { "pnc", 0, "" }, | ||
982 | [NWZ_NVP_PRK] = { "prk", 0, "" }, | 1167 | [NWZ_NVP_PRK] = { "prk", 0, "" }, |
983 | [NWZ_NVP_PSK] = { "psk", 512, "bluetooth pskey" }, | 1168 | [NWZ_NVP_PSK] = { "psk", 512, "bluetooth pskey" }, |
984 | [NWZ_NVP_PTS] = { "pts", 4, "wifi protected setup" }, | 1169 | [NWZ_NVP_PTS] = { "pts", 4, "wifi protected setup" }, |
@@ -1005,6 +1190,7 @@ struct nwz_nvp_info_t nwz_nvp[NWZ_NVP_COUNT] = | |||
1005 | [NWZ_NVP_UFN] = { "ufn", 8, "update file name" }, | 1190 | [NWZ_NVP_UFN] = { "ufn", 8, "update file name" }, |
1006 | [NWZ_NVP_UMS] = { "ums", 0, "" }, | 1191 | [NWZ_NVP_UMS] = { "ums", 0, "" }, |
1007 | [NWZ_NVP_UPS] = { "ups", 0, "" }, | 1192 | [NWZ_NVP_UPS] = { "ups", 0, "" }, |
1193 | [NWZ_NVP_VAR] = { "var", 0, "" }, | ||
1008 | [NWZ_NVP_VRT] = { "vrt", 4, "europe vol regulation flag" }, | 1194 | [NWZ_NVP_VRT] = { "vrt", 4, "europe vol regulation flag" }, |
1009 | }; | 1195 | }; |
1010 | 1196 | ||
@@ -1143,7 +1329,7 @@ struct nwz_series_info_t nwz_series[NWZ_SERIES_COUNT] = | |||
1143 | { "nwz-s770", "NWZ-S770 Series", 8, models_nwz_s770, 0 }, | 1329 | { "nwz-s770", "NWZ-S770 Series", 8, models_nwz_s770, 0 }, |
1144 | { "nw-s780", "NW-S780 Series", 4, models_nw_s780, &nvp_index_6485c8 }, | 1330 | { "nw-s780", "NW-S780 Series", 4, models_nw_s780, &nvp_index_6485c8 }, |
1145 | { "nw-wm1", "NW-WM1 Series", 2, models_nw_wm1, &nvp_index_398250 }, | 1331 | { "nw-wm1", "NW-WM1 Series", 2, models_nw_wm1, &nvp_index_398250 }, |
1146 | { "nwz-x1000", "NWZ-X1000 Series", 9, models_nwz_x1000, 0 }, | 1332 | { "nwz-x1000", "NWZ-X1000 Series", 9, models_nwz_x1000, &nvp_index_4edba7 }, |
1147 | { "nw-zx100", "NW-ZX100 Series", 6, models_nw_zx100, &nvp_index_92faee }, | 1333 | { "nw-zx100", "NW-ZX100 Series", 6, models_nw_zx100, &nvp_index_92faee }, |
1148 | { "nwz-noname", "NONAME", 3, models_nwz_noname, 0 }, | 1334 | { "nwz-noname", "NONAME", 3, models_nwz_noname, 0 }, |
1149 | }; | 1335 | }; |