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authorJack Halpin <jack.halpin@gmail.com>2009-12-01 20:12:25 +0000
committerJack Halpin <jack.halpin@gmail.com>2009-12-01 20:12:25 +0000
commit5bd4ec0c87db5230d8637a5b3b1fda9b4d5484ea (patch)
treef50b9a57b38db83342f1ecfe7df8ee073038df34 /firmware/target
parent2c50f4222e466b41044094067890033096eb3493 (diff)
downloadrockbox-5bd4ec0c87db5230d8637a5b3b1fda9b4d5484ea.tar.gz
rockbox-5bd4ec0c87db5230d8637a5b3b1fda9b4d5484ea.zip
Sansa AMS: Force sd_enable(true) when using the Debug View HW info page so we can read the registers immediately.
Because we turn off the clocks to the SD controllers between disk accesses we were unable to read the MCI_CLOCK registers until there was a disk access. Now we can read them immediately. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23810 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target')
-rw-r--r--firmware/target/arm/as3525/debug-as3525.c23
1 files changed, 14 insertions, 9 deletions
diff --git a/firmware/target/arm/as3525/debug-as3525.c b/firmware/target/arm/as3525/debug-as3525.c
index 2dda9e4283..0ed51e5898 100644
--- a/firmware/target/arm/as3525/debug-as3525.c
+++ b/firmware/target/arm/as3525/debug-as3525.c
@@ -30,6 +30,7 @@
30#include "pl180.h" 30#include "pl180.h"
31#include "ascodec-target.h" 31#include "ascodec-target.h"
32#include "adc.h" 32#include "adc.h"
33#include "storage.h"
33 34
34#define ON "Enabled" 35#define ON "Enabled"
35#define OFF "Disabled" 36#define OFF "Disabled"
@@ -51,8 +52,8 @@
51#define CLK_I2SI 8 52#define CLK_I2SI 8
52#define CLK_I2SO 9 53#define CLK_I2SO 9
53#define CLK_DBOP 10 54#define CLK_DBOP 10
54#define CLK_SD_MCLK_NAND 11 55#define CLK_SD_MCLK_NAND 11
55#define CLK_SD_MCLK_MSD 12 56#define CLK_SD_MCLK_MSD 12
56#define CLK_USB 13 57#define CLK_USB 13
57 58
58#define I2C2_CPSR0 *((volatile unsigned int *)(I2C_AUDIO_BASE + 0x1C)) 59#define I2C2_CPSR0 *((volatile unsigned int *)(I2C_AUDIO_BASE + 0x1C))
@@ -289,18 +290,22 @@ bool __dbg_hw_info(void)
289 290
290 lcd_putsf(0, line++, "I2SO: %s %3dMHz", (CGU_AUDIO & (1<<11)) ? 291 lcd_putsf(0, line++, "I2SO: %s %3dMHz", (CGU_AUDIO & (1<<11)) ?
291 "on " : "off", calc_freq(CLK_I2SO)/1000000); 292 "on " : "off", calc_freq(CLK_I2SO)/1000000);
292 if(MCI_NAND) 293
293 last_nand = MCI_NAND; 294 /* Enable SD cards to read the registers */
294 /* MCLK == PCLK */ 295 sd_enable(true);
296 last_nand = MCI_NAND;
297#ifdef HAVE_MULTIDRIVE
298 last_sd = MCI_SD;
299#endif
300 sd_enable(false);
301
295 lcd_putsf(0, line++, "SD :%3dMHz %3dMHz", 302 lcd_putsf(0, line++, "SD :%3dMHz %3dMHz",
296 ((last_nand ? (AS3525_PCLK_FREQ/ 1000000): 0) / 303 ((AS3525_PCLK_FREQ/ 1000000) /
297 ((last_nand & MCI_CLOCK_BYPASS)? 1:(((last_nand & 0xff)+1) * 2))), 304 ((last_nand & MCI_CLOCK_BYPASS)? 1:(((last_nand & 0xff)+1) * 2))),
298 calc_freq(CLK_SD_MCLK_NAND)/1000000); 305 calc_freq(CLK_SD_MCLK_NAND)/1000000);
299#ifdef HAVE_MULTIDRIVE 306#ifdef HAVE_MULTIDRIVE
300 if(MCI_SD)
301 last_sd = MCI_SD;
302 lcd_putsf(0, line++, "uSD :%3dMHz %3dMHz", 307 lcd_putsf(0, line++, "uSD :%3dMHz %3dMHz",
303 ((last_sd ? (AS3525_PCLK_FREQ/ 1000000): 0) / 308 ((AS3525_PCLK_FREQ/ 1000000) /
304 ((last_sd & MCI_CLOCK_BYPASS) ? 1: (((last_sd & 0xff) + 1) * 2))), 309 ((last_sd & MCI_CLOCK_BYPASS) ? 1: (((last_sd & 0xff) + 1) * 2))),
305 calc_freq(CLK_SD_MCLK_MSD)/1000000); 310 calc_freq(CLK_SD_MCLK_MSD)/1000000);
306#endif 311#endif