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authorMichael Sevakis <jethead71@rockbox.org>2007-11-08 05:17:20 +0000
committerMichael Sevakis <jethead71@rockbox.org>2007-11-08 05:17:20 +0000
commit57d71e4267ecf66c84173f8ff3606091187b93b1 (patch)
tree7992814f1dfbcf7c5251cad0fdc6da9a5ebb70a3 /firmware/target
parent194a66ef83664b0ebd23b9bea031c67c3b80f6ac (diff)
downloadrockbox-57d71e4267ecf66c84173f8ff3606091187b93b1.tar.gz
rockbox-57d71e4267ecf66c84173f8ff3606091187b93b1.zip
Add some CACHEALIGN_* macros and a helper function to assist in aligning data and buffers on PortalPlayer processors to cache line boundaries. They're noops when PROC_NEED_CACHEALIGN isn't defined. Go safe and increase the value to 32 since I'm not sure yet if 16 is sufficient - changing that is a one-liner. Add helper to plugin API which will be needed shortly.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@15523 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target')
-rw-r--r--firmware/target/arm/sandisk/sansa-e200/lcd-e200.c4
-rw-r--r--firmware/target/arm/system-target.h8
2 files changed, 9 insertions, 3 deletions
diff --git a/firmware/target/arm/sandisk/sansa-e200/lcd-e200.c b/firmware/target/arm/sandisk/sansa-e200/lcd-e200.c
index aa969d2bff..e1212c9512 100644
--- a/firmware/target/arm/sandisk/sansa-e200/lcd-e200.c
+++ b/firmware/target/arm/sandisk/sansa-e200/lcd-e200.c
@@ -109,9 +109,9 @@ static unsigned short r_drv_output_control = R_DRV_OUTPUT_CONTROL_NORMAL;
109/* We don't know how to receive a DMA finished signal from the LCD controller 109/* We don't know how to receive a DMA finished signal from the LCD controller
110 * To avoid problems with flickering, we double-buffer the framebuffer and turn 110 * To avoid problems with flickering, we double-buffer the framebuffer and turn
111 * off DMA while updates are taking place 111 * off DMA while updates are taking place
112 * Same alignment as in lcd-16bit.c and cache interference free */ 112 * At least the alignment as in lcd-16bit.c and cache interference free */
113static fb_data lcd_driver_framebuffer[LCD_FBHEIGHT][LCD_FBWIDTH] 113static fb_data lcd_driver_framebuffer[LCD_FBHEIGHT][LCD_FBWIDTH]
114 __attribute__((aligned(16))); 114 CACHEALIGN_AT_LEAST_ATTR(16);
115 115
116#ifdef BOOTLOADER 116#ifdef BOOTLOADER
117static void lcd_init_gpio(void) 117static void lcd_init_gpio(void)
diff --git a/firmware/target/arm/system-target.h b/firmware/target/arm/system-target.h
index 6e433be9d5..e9419b3f86 100644
--- a/firmware/target/arm/system-target.h
+++ b/firmware/target/arm/system-target.h
@@ -94,11 +94,17 @@ static inline unsigned int processor_id(void)
94#define UNCACHED_ADDR(a) (a) 94#define UNCACHED_ADDR(a) (a)
95#else 95#else
96#define UNCACHED_ADDR(a) \ 96#define UNCACHED_ADDR(a) \
97 ((typeof (a))((uintptr_t)(a) + 0x10000000)) 97 ((typeof (a))((uintptr_t)(a) | 0x10000000))
98#endif 98#endif
99 99
100#ifdef CPU_PP502x 100#ifdef CPU_PP502x
101 101
102/* Certain data needs to be out of the way of cache line interference
103 * such as data for COP use or for use with UNCACHED_ADDR */
104#define PROC_NEEDS_CACHEALIGN
105#define CACHEALIGN_BITS (5) /* 2^5 = 32 bytes */
106
107/** cache functions **/
102#ifndef BOOTLOADER 108#ifndef BOOTLOADER
103#define CACHE_FUNCTIONS_AS_CALL 109#define CACHE_FUNCTIONS_AS_CALL
104 110