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authorAmaury Pouly <pamaury@rockbox.org>2010-06-21 20:25:50 +0000
committerAmaury Pouly <pamaury@rockbox.org>2010-06-21 20:25:50 +0000
commit4ed8306121e8ca2a8baf5a56dd682ec4f3486ec8 (patch)
treeed8ba3331349ddcfabc315ac069e67af1a5422c7 /firmware/target
parent7ef8b0ec4bb60b489958349123a24a0e19591e66 (diff)
downloadrockbox-4ed8306121e8ca2a8baf5a56dd682ec4f3486ec8.tar.gz
rockbox-4ed8306121e8ca2a8baf5a56dd682ec4f3486ec8.zip
as3525v2-usb: definitely switch to this clock handling, it is the good one
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@27033 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target')
-rw-r--r--firmware/target/arm/as3525/usb-drv-as3525v2.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/firmware/target/arm/as3525/usb-drv-as3525v2.c b/firmware/target/arm/as3525/usb-drv-as3525v2.c
index 8acc3685d7..5e3a325a02 100644
--- a/firmware/target/arm/as3525/usb-drv-as3525v2.c
+++ b/firmware/target/arm/as3525/usb-drv-as3525v2.c
@@ -89,13 +89,9 @@ static void as3525v2_connect(void)
89 usb_delay(); 89 usb_delay();
90 /* 2) enable usb phy clock */ 90 /* 2) enable usb phy clock */
91 /* PHY clock */ 91 /* PHY clock */
92 #if 1
93 CGU_USB = 1<<5 /* enable */ 92 CGU_USB = 1<<5 /* enable */
94 | (CLK_DIV(AS3525_PLLA_FREQ, 60000000)) << 2 93 | (CLK_DIV(AS3525_PLLA_FREQ, 60000000)) << 2
95 | 1; /* source = PLLA */ 94 | 1; /* source = PLLA */
96 #else
97 CGU_USB = 0x20;
98 #endif
99 usb_delay(); 95 usb_delay();
100 /* 3) clear "stop pclk" */ 96 /* 3) clear "stop pclk" */
101 PCGCCTL &= ~0x1; 97 PCGCCTL &= ~0x1;