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author | Aidan MacDonald <amachronic@protonmail.com> | 2022-03-16 11:48:12 +0000 |
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committer | Aidan MacDonald <amachronic@protonmail.com> | 2022-03-16 12:02:24 -0400 |
commit | c676736792f0df5462d2ff7c1af3ebee8bbbf577 (patch) | |
tree | 0393a51b3da2865dc401b36e3523e0efdbbf8dce /firmware/target | |
parent | 0df71c952c033204fc745f24694c3030793fb623 (diff) | |
download | rockbox-c676736792f0df5462d2ff7c1af3ebee8bbbf577.tar.gz rockbox-c676736792f0df5462d2ff7c1af3ebee8bbbf577.zip |
x1000: optimize crt0.S, improve correctness
Replace inline section copy/fill loops with subroutines, which
reduces code size a bit and and handle zero size copies properly.
Remove the cache initialization loop as well. There's no actual
reason for this because the SPL initializes the caches and just
dropping the cache can even be harmful (in this case it wasn't,
because the SPL flushes the whole cache right before calling in).
Change-Id: I7cddc9ed6d060b1f1bdd75544297883d014cad2d
Diffstat (limited to 'firmware/target')
-rw-r--r-- | firmware/target/mips/ingenic_x1000/crt0.S | 101 |
1 files changed, 43 insertions, 58 deletions
diff --git a/firmware/target/mips/ingenic_x1000/crt0.S b/firmware/target/mips/ingenic_x1000/crt0.S index f7cb4686f1..5610587094 100644 --- a/firmware/target/mips/ingenic_x1000/crt0.S +++ b/firmware/target/mips/ingenic_x1000/crt0.S | |||
@@ -49,75 +49,38 @@ _header: | |||
49 | .ascii "ENDH" /* end of header structure */ | 49 | .ascii "ENDH" /* end of header structure */ |
50 | 50 | ||
51 | _realstart: | 51 | _realstart: |
52 | /* Cache init */ | ||
53 | li v0, 0x80000000 | ||
54 | ori v1, v0, 0x4000 | ||
55 | mtc0 zero, C0_TAGLO | ||
56 | mtc0 zero, C0_TAGHI | ||
57 | _cache_loop: | ||
58 | cache ICIndexStTag, 0(v0) | ||
59 | cache DCIndexStTag, 0(v0) | ||
60 | addiu v0, v0, 32 | ||
61 | bne v0, v1, _cache_loop | ||
62 | nop | ||
63 | |||
64 | /* Invalidate BTB */ | ||
65 | mfc0 v0, C0_Config, 7 | ||
66 | nop | ||
67 | ori v0, v0, 2 | ||
68 | mtc0 v0, C0_Config, 7 | ||
69 | nop | ||
70 | |||
71 | /* Copy IRAM from BSS to low memory. */ | 52 | /* Copy IRAM from BSS to low memory. */ |
72 | la t0, _iramcopy | 53 | la a0, _iramcopy |
73 | la t1, _iramstart | 54 | la a1, _iramstart |
74 | la t2, _iramend | 55 | la a2, _iramend |
75 | _iram_loop: | 56 | bal _copy |
76 | lw t3, 0(t0) | 57 | nop |
77 | addiu t1, 4 | ||
78 | addiu t0, 4 | ||
79 | bne t1, t2, _iram_loop | ||
80 | sw t3, -4(t1) | ||
81 | 58 | ||
82 | #if 0 | ||
83 | /* Copy TCSM from BSS */ | 59 | /* Copy TCSM from BSS */ |
84 | la t0, _tcsmcopy | 60 | la a0, _tcsmcopy |
85 | la t1, _tcsmstart | 61 | la a1, _tcsmstart |
86 | la t2, _tcsmend | 62 | la a2, _tcsmend |
87 | _tcsm_loop: | 63 | bal _copy |
88 | lw t3, 0(t0) | 64 | nop |
89 | addiu t0, 4 | ||
90 | sw t3, 0(t1) | ||
91 | bne t1, t2, _tcsm_loop | ||
92 | addiu t1, 4 | ||
93 | #endif | ||
94 | 65 | ||
95 | /* Clear the BSS segment (needed to zero-initialize C static values) */ | 66 | /* Clear the BSS segment (needed to zero-initialize C static values) */ |
96 | la t0, _bssbegin | 67 | la a0, _bssbegin |
97 | la t1, _bssend | 68 | la a1, _bssend |
98 | beq t0, t1, _bss_done | 69 | bal _clear |
99 | _bss_loop: | 70 | move a2, $0 |
100 | addiu t0, 4 | ||
101 | bne t0, t1, _bss_loop | ||
102 | sw zero, -4(t0) | ||
103 | _bss_done: | ||
104 | 71 | ||
105 | /* Set stack pointer and clear the stack */ | 72 | /* Set stack pointer and clear the stack */ |
106 | la sp, stackend | 73 | la sp, stackend |
107 | la t0, stackbegin | 74 | la a0, stackbegin |
108 | li t1, 0xDEADBEEF | 75 | li a2, 0xDEADBEEF |
109 | _stack_loop: | 76 | bal _clear |
110 | addiu t0, 4 | 77 | move a1, sp |
111 | bne t0, sp, _stack_loop | ||
112 | sw t1, -4(t0) | ||
113 | 78 | ||
114 | /* Clear the IRQ stack */ | 79 | /* Clear the IRQ stack */ |
115 | la k0, _irqstackend | 80 | la k0, _irqstackend |
116 | la t0, _irqstackbegin | 81 | la a0, _irqstackbegin |
117 | _irqstack_loop: | 82 | bal _clear |
118 | addiu t0, 4 | 83 | move a1, k0 |
119 | bne t0, k0, _irqstack_loop | ||
120 | sw t1, -4(t0) | ||
121 | 84 | ||
122 | /* Jump to C code */ | 85 | /* Jump to C code */ |
123 | jal system_early_init | 86 | jal system_early_init |
@@ -125,6 +88,28 @@ _irqstack_loop: | |||
125 | j main | 88 | j main |
126 | nop | 89 | nop |
127 | 90 | ||
91 | /* copy(void* src, void* dst, void* dst_end) */ | ||
92 | _copy: | ||
93 | beq a1, a2, 1f | ||
94 | addiu a1, 4 | ||
95 | lw t0, 0(a0) | ||
96 | addiu a0, 4 | ||
97 | b _copy | ||
98 | sw t0, -4(a1) | ||
99 | 1: | ||
100 | jr ra | ||
101 | nop | ||
102 | |||
103 | /* clear(void* dst, void* dst_end, int value) */ | ||
104 | _clear: | ||
105 | beq a0, a1, 1f | ||
106 | addiu a0, 4 | ||
107 | b _clear | ||
108 | sw a2, -4(a0) | ||
109 | 1: | ||
110 | jr ra | ||
111 | nop | ||
112 | |||
128 | /* Exception entry points */ | 113 | /* Exception entry points */ |
129 | .section .vectors.1, "ax", %progbits | 114 | .section .vectors.1, "ax", %progbits |
130 | j tlb_refill_handler | 115 | j tlb_refill_handler |