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| author | Jack Halpin <jack.halpin@gmail.com> | 2010-04-08 06:12:44 +0000 |
|---|---|---|
| committer | Jack Halpin <jack.halpin@gmail.com> | 2010-04-08 06:12:44 +0000 |
| commit | 286fcfe8b11d6b85a0faa24dcce3098a7c24c8e7 (patch) | |
| tree | b31bb37005a1247fdf040703f5460b2104f72f89 /firmware/target/arm | |
| parent | 42973f31757b7d7ea7991d5d56e19a9f1c217813 (diff) | |
| download | rockbox-286fcfe8b11d6b85a0faa24dcce3098a7c24c8e7.tar.gz rockbox-286fcfe8b11d6b85a0faa24dcce3098a7c24c8e7.zip | |
sd-as3525v2: Start out with all MCI Interrupts masked.
Before the clock settings were fixed this setting actually caused the problem it now seems to solve.
Random freezups seem to be gone for clip+ at least.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25531 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm')
| -rw-r--r-- | firmware/target/arm/as3525/sd-as3525v2.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/firmware/target/arm/as3525/sd-as3525v2.c b/firmware/target/arm/as3525/sd-as3525v2.c index 5797dea7f5..059687acce 100644 --- a/firmware/target/arm/as3525/sd-as3525v2.c +++ b/firmware/target/arm/as3525/sd-as3525v2.c | |||
| @@ -658,7 +658,8 @@ static void init_controller(void) | |||
| 658 | /* Rx watermark = 63(sd reads) Tx watermark = 128 (sd writes) */ | 658 | /* Rx watermark = 63(sd reads) Tx watermark = 128 (sd writes) */ |
| 659 | MCI_FIFOTH = (MCI_FIFOTH & MCI_FIFOTH_MASK) | 0x503f0080; | 659 | MCI_FIFOTH = (MCI_FIFOTH & MCI_FIFOTH_MASK) | 0x503f0080; |
| 660 | 660 | ||
| 661 | MCI_MASK = 0xffff & ~(MCI_INT_ACD|MCI_INT_CRDDET|MCI_INT_RXDR|MCI_INT_TXDR); | 661 | /* Mask all MCI Interrupts initially */ |
| 662 | MCI_MASK = 0; | ||
| 662 | 663 | ||
| 663 | GPIOB_DIR |= (1<<5); /* Pin B5 output */ | 664 | GPIOB_DIR |= (1<<5); /* Pin B5 output */ |
| 664 | 665 | ||