summaryrefslogtreecommitdiff
path: root/firmware/target/arm/tms320dm320/boot.lds
diff options
context:
space:
mode:
authorKarl Kurbjun <kkurbjun@gmail.com>2009-04-10 04:48:44 +0000
committerKarl Kurbjun <kkurbjun@gmail.com>2009-04-10 04:48:44 +0000
commitb2c4bd3a53f06699d601e73a7fa0732611e99f7f (patch)
treefa8ffa05e64d6ebc2bcb8a9fcf624013486bf513 /firmware/target/arm/tms320dm320/boot.lds
parenta50e17a6baeddee9a3c936e78436420df10f9854 (diff)
downloadrockbox-b2c4bd3a53f06699d601e73a7fa0732611e99f7f.tar.gz
rockbox-b2c4bd3a53f06699d601e73a7fa0732611e99f7f.zip
M:Robe 500: Remove some dead test code in bootloader, reorganize the bootloader link script, and remove an unnecessary lcd disable/enable in initialization.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@20674 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/tms320dm320/boot.lds')
-rw-r--r--firmware/target/arm/tms320dm320/boot.lds115
1 files changed, 76 insertions, 39 deletions
diff --git a/firmware/target/arm/tms320dm320/boot.lds b/firmware/target/arm/tms320dm320/boot.lds
index e391526dc5..ff8203ccd8 100644
--- a/firmware/target/arm/tms320dm320/boot.lds
+++ b/firmware/target/arm/tms320dm320/boot.lds
@@ -6,24 +6,42 @@ OUTPUT_FORMAT(elf32-littlearm)
6OUTPUT_ARCH(arm) 6OUTPUT_ARCH(arm)
7STARTUP(target/arm/tms320dm320/crt0.o) 7STARTUP(target/arm/tms320dm320/crt0.o)
8 8
9#define LCD_BUFFER_SIZE (LCD_WIDTH*LCD_HEIGHT*2) 9#ifdef DEBUG
10#define STUBOFFSET 0x10000
11#else
12#define STUBOFFSET 0
13#endif
14
15#ifndef LCD_NATIVE_WIDTH
16#define LCD_NATIVE_WIDTH LCD_WIDTH
17#endif
18
19#ifndef LCD_NATIVE_HEIGHT
20#define LCD_NATIVE_HEIGHT LCD_HEIGHT
21#endif
22
23#define LCD_FUDGE LCD_NATIVE_WIDTH%32
24
25#define LCD_BUFFER_SIZE ((LCD_NATIVE_WIDTH+LCD_FUDGE)*LCD_NATIVE_HEIGHT*2)
10 26
11/* must be 16Kb (0x4000) aligned */ 27/* must be 16Kb (0x4000) aligned */
12#define TTB_SIZE (0x4000) 28#define TTB_SIZE (0x4000)
13 29
14#define DRAMSIZE (MEMORYSIZE * 0x100000) - TTB_SIZE - LCD_BUFFER_SIZE 30/* Give this 1 meg to allow it to align to the MMU boundary */
31#define LCD_TTB_AREA 0x100000
32
33#define BOOT_OFFSET 0x1000000
15 34
16#define DRAMORIG 0x01900000 /* actually it's 0x00900000 */ 35#define DRAMSIZE (MEMORYSIZE * 0x100000) - STUBOFFSET - BOOT_OFFSET
17#define IRAMORIG 0x00000000
18#define IRAMSIZE 16K
19#define FLASHORIG 0x00100000
20#define FLASHSIZE 8M
21 36
22/* Now we have the LCD buffer */ 37#define DRAMORIG (0x00900000+BOOT_OFFSET) /* actually it's 0x00900000 */
23#define LCDBEGIN (DRAMSIZE+0x00900000) 38#define IRAMORIG 0x00000000
39#define IRAMSIZE 0x4000
40#define FLASHORIG 0x00100000
41#define FLASHSIZE 8M
24 42
25/* Finally the TTB table */ 43/* End of the audio buffer, where the codec buffer starts */
26#define TTBBEGIN (LCDBEGIN + LCD_BUFFER_SIZE) 44#define TTB_BEGIN (DRAMORIG + DRAMSIZE - LCD_TTB_AREA)
27 45
28MEMORY 46MEMORY
29{ 47{
@@ -40,7 +58,6 @@ SECTIONS
40 loadaddress = .; 58 loadaddress = .;
41 _loadaddress = .; 59 _loadaddress = .;
42 *(.init.text) 60 *(.init.text)
43 *(.icode)
44 *(.text*) 61 *(.text*)
45 *(.glue_7) 62 *(.glue_7)
46 *(.glue_7t) 63 *(.glue_7t)
@@ -53,7 +70,6 @@ SECTIONS
53 *(.rodata*) 70 *(.rodata*)
54 *(.rodata.str1.1) 71 *(.rodata.str1.1)
55 *(.rodata.str1.4) 72 *(.rodata.str1.4)
56 *(.irodata)
57 . = ALIGN(0x4); 73 . = ALIGN(0x4);
58 74
59 /* Pseudo-allocate the copies of the data sections */ 75 /* Pseudo-allocate the copies of the data sections */
@@ -61,31 +77,11 @@ SECTIONS
61 } > DRAM 77 } > DRAM
62 78
63 .data : { 79 .data : {
64 *(.idata)
65 *(.data*) 80 *(.data*)
66 . = ALIGN(0x4); 81 . = ALIGN(0x4);
67 _dataend = . ; 82 _dataend = . ;
68 } > DRAM 83 } > DRAM
69 84
70 .stack :
71 {
72 *(.stack)
73 _stackbegin = .;
74 stackbegin = .;
75 . += 0x2000;
76 _stackend = .;
77 stackend = .;
78 } > DRAM
79
80 .bss :
81 {
82 _edata = .;
83 *(.bss*);
84 *(.ibss);
85 *(COMMON)
86 _end = .;
87 } > DRAM
88
89 .vectors IRAMORIG : 85 .vectors IRAMORIG :
90 { 86 {
91 _vectorsstart = .; 87 _vectorsstart = .;
@@ -94,16 +90,57 @@ SECTIONS
94 KEEP(*(.vectors)); 90 KEEP(*(.vectors));
95 *(.vectors); 91 *(.vectors);
96 _vectorsend = .; 92 _vectorsend = .;
97 } AT > DRAM 93 } > IRAM AT > DRAM
98 _vectorscopy = LOADADDR(.vectors); 94 _vectorscopy = LOADADDR(.vectors);
99 95
100 .lcdbuffer LCDBEGIN (NOLOAD) : 96 .iram :
101 { 97 {
102 _lcdbuf = .; 98 _iramstart = .;
103 } 99 *(.icode)
100 *(.irodata*)
101 *(.idata)
102 . = ALIGN(0x4);
103 _iramend = .;
104 } > IRAM AT> DRAM
105
106 _iramcopy = LOADADDR(.iram);
107
108 .ibss (NOLOAD) :
109 {
110 _iedata = .;
111 *(.ibss)
112 . = ALIGN(0x4);
113 _iend = .;
114 } > IRAM
115
116 .stack (NOLOAD) :
117 {
118 *(.stack)
119 stackbegin = .;
120 . += 0x2000;
121 stackend = .;
122 } > IRAM
123
124 .bss (NOLOAD) :
125 {
126 . = ADDR(.data) + SIZEOF(.data) + SIZEOF(.vectors) + SIZEOF(.iram);
127 _edata = .;
128 *(.bss*)
129 *(COMMON)
130 . = ALIGN(0x4);
131 _end = .;
132 } > DRAM
104 133
105 .ttbtable TTBBEGIN (NOLOAD) : 134 .ttbtable TTB_BEGIN (NOLOAD) :
106 { 135 {
136 . = ALIGN (0x4000);
107 _ttbstart = .; 137 _ttbstart = .;
108 } 138 . += TTB_SIZE;
139 } > DRAM
140
141 .lcdbuffer (NOLOAD) :
142 {
143 _lcdbuf = .;
144 . += LCD_BUFFER_SIZE;
145 } > DRAM
109} 146}