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author | Rafaël Carré <rafael.carre@gmail.com> | 2010-06-11 04:41:36 +0000 |
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committer | Rafaël Carré <rafael.carre@gmail.com> | 2010-06-11 04:41:36 +0000 |
commit | 45c7498f59ad2889f2120a865a51043004eddd5d (patch) | |
tree | 1a62b0e8549a7f2750679de8d7dd3f82039c5719 /firmware/target/arm/thread-arm.c | |
parent | fe7ca44471b309a0adea563cce947de9efb62ab5 (diff) | |
download | rockbox-45c7498f59ad2889f2120a865a51043004eddd5d.tar.gz rockbox-45c7498f59ad2889f2120a865a51043004eddd5d.zip |
FS#11335 by me: make ARM assembly functions thumb-friendly
We can't pop into pc on ARMv4t when using thumb: the T bit won't be
modified if we are returning to a thumb function
Code running on ARMv4t should use the new ldrpc / ldmpc macros instead
of ldr pc, [sp], #4 and ldm(cond) sp!, {regs, pc}
No modification on pure ARM builds and ARMv5+
Note: USE_THUMB is currently never defined, no targets can currently be
built with -mthumb, see FS#6734
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26756 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/thread-arm.c')
-rw-r--r-- | firmware/target/arm/thread-arm.c | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/firmware/target/arm/thread-arm.c b/firmware/target/arm/thread-arm.c index c2d91cec25..9ea3d0bef9 100644 --- a/firmware/target/arm/thread-arm.c +++ b/firmware/target/arm/thread-arm.c | |||
@@ -77,7 +77,15 @@ static inline void load_context(const void* addr) | |||
77 | asm volatile( | 77 | asm volatile( |
78 | "ldr r0, [%0, #40] \n" /* Load start pointer */ | 78 | "ldr r0, [%0, #40] \n" /* Load start pointer */ |
79 | "cmp r0, #0 \n" /* Check for NULL */ | 79 | "cmp r0, #0 \n" /* Check for NULL */ |
80 | "ldmneia %0, { r0, pc } \n" /* If not already running, jump to start */ | 80 | |
81 | /* If not already running, jump to start */ | ||
82 | #if ARM_ARCH == 4 && defined(USE_THUMB) | ||
83 | "ldmneia %0, { r0, r12 } \n" | ||
84 | "bxne r12 \n" | ||
85 | #else | ||
86 | "ldmneia %0, { r0, pc } \n" | ||
87 | #endif | ||
88 | |||
81 | "ldmia %0, { r4-r11, sp, lr } \n" /* Load regs r4 to r14 from context */ | 89 | "ldmia %0, { r4-r11, sp, lr } \n" /* Load regs r4 to r14 from context */ |
82 | : : "r" (addr) : "r0" /* only! */ | 90 | : : "r" (addr) : "r0" /* only! */ |
83 | ); | 91 | ); |