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authorAmaury Pouly <amaury.pouly@gmail.com>2013-06-16 15:30:46 +0200
committerAmaury Pouly <amaury.pouly@gmail.com>2013-06-16 15:30:46 +0200
commite6a931301fe8ef5800b2fd1114f932e9fd9e4db0 (patch)
tree44b86dfad906eaa6fad092af4f0ee6a467f190d4 /firmware/target/arm/imx233/emi-imx233.c
parent2a01b3766f44a14451653e48fd59e9724f0173fb (diff)
downloadrockbox-e6a931301fe8ef5800b2fd1114f932e9fd9e4db0.tar.gz
rockbox-e6a931301fe8ef5800b2fd1114f932e9fd9e4db0.zip
imx233: rewrite emi using new register headers
Change-Id: Ie893162aac38ea3aaf73b4e84e54be714a5fc33f
Diffstat (limited to 'firmware/target/arm/imx233/emi-imx233.c')
-rw-r--r--firmware/target/arm/imx233/emi-imx233.c26
1 files changed, 14 insertions, 12 deletions
diff --git a/firmware/target/arm/imx233/emi-imx233.c b/firmware/target/arm/imx233/emi-imx233.c
index 57a929e65a..8145f3899d 100644
--- a/firmware/target/arm/imx233/emi-imx233.c
+++ b/firmware/target/arm/imx233/emi-imx233.c
@@ -129,10 +129,10 @@ void imx233_emi_set_frequency(unsigned long freq) ICODE_ATTR;
129void imx233_emi_set_frequency(unsigned long freq) 129void imx233_emi_set_frequency(unsigned long freq)
130{ 130{
131 /** FIXME we rely on the compiler to NOT use the stack here because it's 131 /** FIXME we rely on the compiler to NOT use the stack here because it's
132 * in iram ! If it's not smart enough, one can switch the switch to use 132 * not in iram ! If it's not smart enough, one can switch the switch to use
133 * the irq stack since we are running interrupts disable here ! */ 133 * the irq stack since we are running interrupts disable here ! */
134 /** BUG for freq<=24 MHz we must keep bypass mode since we run on xtal 134 /** BUG for freq<=24 MHz we must keep bypass mode since we run on xtal
135 * we this setting is unused by our code so ignore this bug for now */ 135 * since this setting is unused by our code so ignore this bug for now */
136 /** WARNING DANGER 136 /** WARNING DANGER
137 * Changing the EMI frequency is complicated because it requires to 137 * Changing the EMI frequency is complicated because it requires to
138 * completely shutdown the external memory interface. We must make sure 138 * completely shutdown the external memory interface. We must make sure
@@ -140,17 +140,19 @@ void imx233_emi_set_frequency(unsigned long freq)
140 * the sdram will be made during the change. Care must be taken w.r.t to 140 * the sdram will be made during the change. Care must be taken w.r.t to
141 * the cache also. */ 141 * the cache also. */
142 /** FIXME assume that auto-slow is disabled here since that could put some 142 /** FIXME assume that auto-slow is disabled here since that could put some
143 * clock below the minimum value and we want to spend as less time as 143 * clock below the minimum value and we want to spend as least time as
144 * possible in this state anyway. */ 144 * possible in this state anyway.
145 145 * WARNING DANGER don't call any external function when sdram is disabled
146 * otherwise you'll poke sdram and trigger a fatal data abort ! */
147
146 /* first disable all interrupts */ 148 /* first disable all interrupts */
147 int oldstatus = disable_interrupt_save(IRQ_FIQ_STATUS); 149 int oldstatus = disable_interrupt_save(IRQ_FIQ_STATUS);
148 /* flush the cache */ 150 /* flush the cache */
149 commit_discard_idcache(); 151 commit_discard_idcache();
150 /* put DRAM into self-refresh mode */ 152 /* put DRAM into self-refresh mode */
151 HW_DRAM_CTL08 |= HW_DRAM_CTL08__SREFRESH; 153 HW_DRAM_CTL08 |= BM_DRAM_CTL08_SREFRESH;
152 /* wait for DRAM to be halted */ 154 /* wait for DRAM to be halted */
153 while(!(HW_EMI_STAT & HW_EMI_STAT__DRAM_HALTED)); 155 while(!BF_RD(EMI_STAT, DRAM_HALTED));
154 /* load timings */ 156 /* load timings */
155 struct emi_reg_t *regs; 157 struct emi_reg_t *regs;
156 if(freq <= 24000) regs = settings_24M; 158 if(freq <= 24000) regs = settings_24M;
@@ -170,7 +172,7 @@ void imx233_emi_set_frequency(unsigned long freq)
170 /* wait for transition */ 172 /* wait for transition */
171 while(BF_RD(CLKCTRL_EMI, BUSY_REF_XTAL)); 173 while(BF_RD(CLKCTRL_EMI, BUSY_REF_XTAL));
172 /* put emi dll into reset mode */ 174 /* put emi dll into reset mode */
173 __REG_SET(HW_EMI_CTRL) = HW_EMI_CTRL__DLL_RESET | HW_EMI_CTRL__DLL_SHIFT_RESET; 175 HW_EMI_CTRL_SET = BM_EMI_CTRL_DLL_RESET | BM_EMI_CTRL_DLL_SHIFT_RESET;
174 /* load the new frequency dividers */ 176 /* load the new frequency dividers */
175 set_frequency(freq); 177 set_frequency(freq);
176 /* switch emi back to pll */ 178 /* switch emi back to pll */
@@ -178,13 +180,13 @@ void imx233_emi_set_frequency(unsigned long freq)
178 /* wait for transition */ 180 /* wait for transition */
179 while(BF_RD(CLKCTRL_EMI, BUSY_REF_EMI)); 181 while(BF_RD(CLKCTRL_EMI, BUSY_REF_EMI));
180 /* allow emi dll to lock again */ 182 /* allow emi dll to lock again */
181 __REG_CLR(HW_EMI_CTRL) = HW_EMI_CTRL__DLL_RESET | HW_EMI_CTRL__DLL_SHIFT_RESET; 183 HW_EMI_CTRL_CLR = BM_EMI_CTRL_DLL_RESET | BM_EMI_CTRL_DLL_SHIFT_RESET;
182 /* wait for lock */ 184 /* wait for lock */
183 while(!(HW_DRAM_CTL04 & HW_DRAM_CTL04__DLLLOCKREG)); 185 while(!BF_RD(DRAM_CTL04, DLLLOCKREG));
184 /* get DRAM out of self-refresh mode */ 186 /* get DRAM out of self-refresh mode */
185 HW_DRAM_CTL08 &= ~HW_DRAM_CTL08__SREFRESH; 187 HW_DRAM_CTL08 &= ~BM_DRAM_CTL08_SREFRESH;
186 /* wait for DRAM to be to run again */ 188 /* wait for DRAM to be to run again */
187 while(HW_EMI_STAT & HW_EMI_STAT__DRAM_HALTED); 189 while(HW_EMI_STAT & BM_EMI_STAT_DRAM_HALTED);
188 190
189 restore_interrupt(oldstatus); 191 restore_interrupt(oldstatus);
190} 192}