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author | Rob Purchase <shotofadds@rockbox.org> | 2008-01-25 21:37:59 +0000 |
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committer | Rob Purchase <shotofadds@rockbox.org> | 2008-01-25 21:37:59 +0000 |
commit | 59914786289033648db9bd5f4222978767e4d665 (patch) | |
tree | c8fad961c9c20a8799d9821e3240099b9375323b /firmware/export | |
parent | b4f80fb93fe290d4498a9f1eecd2f15f0c19abf8 (diff) | |
download | rockbox-59914786289033648db9bd5f4222978767e4d665.tar.gz rockbox-59914786289033648db9bd5f4222978767e4d665.zip |
Read ID codes & raw page data from D2 NAND flash (work in progress;
no logical->physical address translation yet)
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@16167 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/export')
-rw-r--r-- | firmware/export/tcc780x.h | 28 |
1 files changed, 22 insertions, 6 deletions
diff --git a/firmware/export/tcc780x.h b/firmware/export/tcc780x.h index df55c6f03d..78211acf0a 100644 --- a/firmware/export/tcc780x.h +++ b/firmware/export/tcc780x.h | |||
@@ -85,6 +85,22 @@ | |||
85 | #define CKSEL_PLL1 1 | 85 | #define CKSEL_PLL1 1 |
86 | #define CKSEL_XIN 4 | 86 | #define CKSEL_XIN 4 |
87 | 87 | ||
88 | /* Device bits for SWRESET & BCLKCTR */ | ||
89 | |||
90 | #define DEV_LCDC (1<<2) | ||
91 | #define DEV_SDMMC (1<<6) | ||
92 | #define DEV_NAND (1<<9) | ||
93 | #define DEV_DAI (1<<14) | ||
94 | #define DEV_ECC (1<<16) | ||
95 | #define DEV_RTC (1<<21) | ||
96 | #define DEV_SDRAM (1<<22) | ||
97 | #define DEV_COP (1<<23) | ||
98 | #define DEV_ADC (1<<24) | ||
99 | #define DEV_TIMER (1<<26) | ||
100 | #define DEV_CPU (1<<27) | ||
101 | #define DEV_IRQ (1<<28) | ||
102 | #define DEV_MAIN (1<<31) | ||
103 | |||
88 | /* IRQ Controller */ | 104 | /* IRQ Controller */ |
89 | 105 | ||
90 | #define IEN (*(volatile unsigned long *)0xF3001000) | 106 | #define IEN (*(volatile unsigned long *)0xF3001000) |
@@ -111,12 +127,12 @@ | |||
111 | #define TREF1 (*(volatile unsigned long *)0xF3003018) | 127 | #define TREF1 (*(volatile unsigned long *)0xF3003018) |
112 | 128 | ||
113 | #define TIREQ (*(volatile unsigned long *)0xF3003060) | 129 | #define TIREQ (*(volatile unsigned long *)0xF3003060) |
114 | /* ref. value reached */ | 130 | |
115 | #define TF0 (1<<8) | 131 | /* TIREQ flags */ |
116 | #define TF1 (1<<9) | 132 | #define TF0 (1<<8) /* Timer 0 reference value reached */ |
117 | /* irq. status */ | 133 | #define TF1 (1<<9) /* Timer 1 reference value reached */ |
118 | #define TI0 (1<<0) | 134 | #define TI0 (1<<0) /* Timer 0 IRQ flag */ |
119 | #define TI1 (1<<1) | 135 | #define TI1 (1<<1) /* Timer 1 IRQ flag */ |
120 | 136 | ||
121 | #define TC32EN (*(volatile unsigned long *)0xF3003080) | 137 | #define TC32EN (*(volatile unsigned long *)0xF3003080) |
122 | #define TC32LDV (*(volatile unsigned long *)0xF3003084) | 138 | #define TC32LDV (*(volatile unsigned long *)0xF3003084) |