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authorCástor Muñoz <cmvidal@gmail.com>2016-07-31 03:40:32 +0200
committerCástor Muñoz <cmvidal@gmail.com>2016-08-02 04:57:50 +0200
commit3c5aa754de9c9e572232b469398a981dccfff127 (patch)
treef67d41afeb7df68b91753bb2d66d3c8ce945207f /firmware/export/s5l8702.h
parent5e305d35c94199241f71a994cf6a691aec49688c (diff)
downloadrockbox-3c5aa754de9c9e572232b469398a981dccfff127.tar.gz
rockbox-3c5aa754de9c9e572232b469398a981dccfff127.zip
iPod Classic: use the new USB DesignWare driver
Change-Id: I36aabb5cb9cfe2d8c4f8fbcea944efec58ef9671
Diffstat (limited to 'firmware/export/s5l8702.h')
-rw-r--r--firmware/export/s5l8702.h17
1 files changed, 15 insertions, 2 deletions
diff --git a/firmware/export/s5l8702.h b/firmware/export/s5l8702.h
index 6500f69d37..4799b05d4f 100644
--- a/firmware/export/s5l8702.h
+++ b/firmware/export/s5l8702.h
@@ -175,8 +175,21 @@
175/////USB///// 175/////USB/////
176#define OTGBASE 0x38400000 176#define OTGBASE 0x38400000
177#define PHYBASE 0x3C400000 177#define PHYBASE 0x3C400000
178#define SYNOPSYSOTG_CLOCK 0 178
179#define SYNOPSYSOTG_AHBCFG (GAHBCFG_dma_enable | (GAHBCFG_INT_DMA_BURST_INCR8 << GAHBCFG_hburstlen_bitp) | GAHBCFG_glblintrmsk) 179/* OTG PHY control registers */
180#define OPHYPWR (*((uint32_t volatile*)(PHYBASE + 0x000)))
181#define OPHYCLK (*((uint32_t volatile*)(PHYBASE + 0x004)))
182#define ORSTCON (*((uint32_t volatile*)(PHYBASE + 0x008)))
183#define OPHYUNK3 (*((uint32_t volatile*)(PHYBASE + 0x018)))
184#define OPHYUNK1 (*((uint32_t volatile*)(PHYBASE + 0x01c)))
185#define OPHYUNK2 (*((uint32_t volatile*)(PHYBASE + 0x044)))
186
187/* 9 available EPs (0b00000001111101010000000111101011), 6 used */
188#define USB_NUM_ENDPOINTS 6
189
190/* Define this if the DWC implemented on this SoC does not support
191 DMA or you want to disable it. */
192// #define USB_DW_ARCH_SLAVE
180 193
181 194
182/////I2C///// 195/////I2C/////