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author | Michael Sevakis <jethead71@rockbox.org> | 2010-05-04 10:07:53 +0000 |
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committer | Michael Sevakis <jethead71@rockbox.org> | 2010-05-04 10:07:53 +0000 |
commit | 931e06de64100e28031627964321da3fdb449378 (patch) | |
tree | 72a073d7ec3ede9554b394887d43d19fda6e8177 /firmware/export/mc13783.h | |
parent | 7480afb3c59f4aebff262e1ce47395a3924ca994 (diff) | |
download | rockbox-931e06de64100e28031627964321da3fdb449378.tar.gz rockbox-931e06de64100e28031627964321da3fdb449378.zip |
i.MX31/Gigabeat S: Actually enable DPTC which can set optimal voltage for 528MHz. Requires an SPI and PMIC interface rework because of the low-latency needs for the DPTC to work best with minimal panicing. SPI can work with multitasking and asynchronously from interrupt handlers or normal code.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25800 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/export/mc13783.h')
-rw-r--r-- | firmware/export/mc13783.h | 18 |
1 files changed, 15 insertions, 3 deletions
diff --git a/firmware/export/mc13783.h b/firmware/export/mc13783.h index 0a83527c57..e513fa1717 100644 --- a/firmware/export/mc13783.h +++ b/firmware/export/mc13783.h | |||
@@ -21,6 +21,8 @@ | |||
21 | #ifndef _MC13783_H_ | 21 | #ifndef _MC13783_H_ |
22 | #define _MC13783_H_ | 22 | #define _MC13783_H_ |
23 | 23 | ||
24 | #include "spi-imx31.h" | ||
25 | |||
24 | enum mc13783_regs_enum | 26 | enum mc13783_regs_enum |
25 | { | 27 | { |
26 | MC13783_INTERRUPT_STATUS0 = 0, | 28 | MC13783_INTERRUPT_STATUS0 = 0, |
@@ -1261,11 +1263,21 @@ void mc13783_init(void); | |||
1261 | void mc13783_close(void); | 1263 | void mc13783_close(void); |
1262 | uint32_t mc13783_set(unsigned address, uint32_t bits); | 1264 | uint32_t mc13783_set(unsigned address, uint32_t bits); |
1263 | uint32_t mc13783_clear(unsigned address, uint32_t bits); | 1265 | uint32_t mc13783_clear(unsigned address, uint32_t bits); |
1266 | uint32_t mc13783_read(unsigned address); | ||
1264 | int mc13783_write(unsigned address, uint32_t data); | 1267 | int mc13783_write(unsigned address, uint32_t data); |
1265 | uint32_t mc13783_write_masked(unsigned address, uint32_t data, uint32_t mask); | 1268 | uint32_t mc13783_write_masked(unsigned address, uint32_t data, uint32_t mask); |
1266 | int mc13783_write_regset(const unsigned char *regs, const uint32_t *data, int count); | 1269 | /* buffer must be available as packet workspace */ |
1267 | uint32_t mc13783_read(unsigned address); | 1270 | int mc13783_read_regs(const unsigned char *regs, uint32_t *buffer, int count); |
1268 | int mc13783_read_regset(const unsigned char *regs, uint32_t *buffer, int count); | 1271 | /* buffer must be available as packet workspace */ |
1272 | int mc13783_write_regs(const unsigned char *regs, uint32_t *buffer, int count); | ||
1273 | /* buffer must be available as packet workspace */ | ||
1274 | bool mc13783_read_async(struct spi_transfer_desc *xfer, | ||
1275 | const unsigned char *regs, uint32_t *buffer, | ||
1276 | int count, spi_transfer_cb_fn_type callback); | ||
1277 | /* buffer must be available as packet workspace */ | ||
1278 | bool mc13783_write_async(struct spi_transfer_desc *xfer, | ||
1279 | const unsigned char *regs, uint32_t *buffer, | ||
1280 | int count, spi_transfer_cb_fn_type callback); | ||
1269 | 1281 | ||
1270 | #define MC13783_DATA_ERROR UINT32_MAX | 1282 | #define MC13783_DATA_ERROR UINT32_MAX |
1271 | 1283 | ||