diff options
| author | Rafaël Carré <rafael.carre@gmail.com> | 2010-04-05 04:48:43 +0000 |
|---|---|---|
| committer | Rafaël Carré <rafael.carre@gmail.com> | 2010-04-05 04:48:43 +0000 |
| commit | 7a90aa40c605ec27f6743e2dd3bb55d46495601a (patch) | |
| tree | 2c774a7926363d96fe0d8066e7b2735ed5d73ff9 /firmware/export/config | |
| parent | 0eb888b23a5d27dd5b537b258e08e61ae87b6c2a (diff) | |
| download | rockbox-7a90aa40c605ec27f6743e2dd3bb55d46495601a.tar.gz rockbox-7a90aa40c605ec27f6743e2dd3bb55d46495601a.zip | |
as3525v2: set PCLK correctly
PCLK doesn't use PLLA as a source but FCLK, so when changing FCLK with
CGU_PROC register, we must change PCLK as well with CGU_PERI register
Operate with 24MHz PCLK (and unboosted FCLK) for Clipv2/Clip+
Use 60MHz on Fuzev2 to keep the display fast enough (still slower than
Fuzev1 though)
µSD seems to function correctly now
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25475 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/export/config')
0 files changed, 0 insertions, 0 deletions