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author | Linus Nielsen Feltzing <linus@haxx.se> | 2004-10-15 02:10:30 +0000 |
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committer | Linus Nielsen Feltzing <linus@haxx.se> | 2004-10-15 02:10:30 +0000 |
commit | 29644eb8f8578079a9f0da9e60e3529b8de2b0bd (patch) | |
tree | 6a3dcee44d0f29b2c90b6ac0db93a5c09d4d36dd /firmware/crt0.S | |
parent | 9088b06bf5ca4b71c9e7e07925a1a5e8f37daaa9 (diff) | |
download | rockbox-29644eb8f8578079a9f0da9e60e3529b8de2b0bd.tar.gz rockbox-29644eb8f8578079a9f0da9e60e3529b8de2b0bd.zip |
Coldfire: Set up DRAM controller, copy data/iram sections and call main()
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@5279 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/crt0.S')
-rw-r--r-- | firmware/crt0.S | 49 |
1 files changed, 35 insertions, 14 deletions
diff --git a/firmware/crt0.S b/firmware/crt0.S index f98689eb0a..207946bd2c 100644 --- a/firmware/crt0.S +++ b/firmware/crt0.S | |||
@@ -73,20 +73,41 @@ start: | |||
73 | We have to be careful with the access times, | 73 | We have to be careful with the access times, |
74 | since IORDY isn't connected to the HDD. */ | 74 | since IORDY isn't connected to the HDD. */ |
75 | 75 | ||
76 | 76 | ||
77 | /* Test code: blink the backlight */ | 77 | /* Set up the DRAM controller. The refresh is based on the 11.2896MHz |
78 | move.l #0x00020000,%d0 | 78 | clock (5.6448MHz bus frequency). We haven't yet started the PLL */ |
79 | move.l %d0,(0xbc,%a1) /* Function = 1 */ | 79 | move.l #0x80050000,%d0 |
80 | move.l %d0,(0xb8,%a1) /* Enable = 1 */ | 80 | move.l %d0,(0x100,%a0) /* DCR - Synchronous, 80 cycle refresh */ |
81 | 81 | move.l #0x3000a520,%d0 | |
82 | .blinkloop: | 82 | move.l %d0,(0x108,%a0) /* DACR0 - Base 0x30000000, Banks on 23 and up, |
83 | eor.l %d0,(0xb4,%a1) | 83 | CAS latency 3, Refresh enable */ |
84 | 84 | move.l #0x01fc0001,%d0 | |
85 | move.l #2000000,%d2 | 85 | move.l %d0,(0x10c,%a0) /* DMR0 - 32Mb */ |
86 | .delay: | 86 | |
87 | subq.l #1,%d2 | 87 | lea _iramcopy,%a2 |
88 | bne .delay | 88 | lea _iramstart,%a3 |
89 | jmp .blinkloop | 89 | lea _iramend,%a4 |
90 | .iramloop: | ||
91 | cmp.l %a3,%a4 | ||
92 | beq .iramloopend | ||
93 | move.w (%a2)+,(%a3)+ | ||
94 | bra .iramloop | ||
95 | .iramloopend: | ||
96 | |||
97 | lea _datacopy,%a2 | ||
98 | lea _datastart,%a3 | ||
99 | lea _dataend,%a4 | ||
100 | .dataloop: | ||
101 | cmp.l %a3,%a4 | ||
102 | beq .dataloopend | ||
103 | move.w (%a2)+,(%a3)+ | ||
104 | bra .dataloop | ||
105 | .dataloopend: | ||
106 | |||
107 | lea stackend,%sp | ||
108 | jsr main | ||
109 | .hoo: | ||
110 | bra .hoo | ||
90 | 111 | ||
91 | .section .resetvectors | 112 | .section .resetvectors |
92 | vectors: | 113 | vectors: |