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authorThom Johansen <thomj@rockbox.org>2005-11-20 01:58:56 +0000
committerThom Johansen <thomj@rockbox.org>2005-11-20 01:58:56 +0000
commit118144fb0c7ead7f19ac7947de278de805d12cf1 (patch)
treeab5d02edae962e2a60453a43b6032fa78ce6a707 /firmware/crt0.S
parentb363b2f93407b9adb85976576aaeb59dcfc78af7 (diff)
downloadrockbox-118144fb0c7ead7f19ac7947de278de805d12cf1.tar.gz
rockbox-118144fb0c7ead7f19ac7947de278de805d12cf1.zip
Startup code for ordinary Rockbox.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@8006 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/crt0.S')
-rw-r--r--firmware/crt0.S77
1 files changed, 52 insertions, 25 deletions
diff --git a/firmware/crt0.S b/firmware/crt0.S
index 5a5d0037ef..82f1b82a73 100644
--- a/firmware/crt0.S
+++ b/firmware/crt0.S
@@ -34,18 +34,62 @@ start:
34 * Copyright (c) 2005, Bernard Leach <leachbj@bouncycastle.org> 34 * Copyright (c) 2005, Bernard Leach <leachbj@bouncycastle.org>
35 * 35 *
36 */ 36 */
37 .equ PP5002_PROC_ID, 0xc4000000 37 .equ PP5002_PROC_ID, 0xc4000000
38 .equ PP5002COP_CTRL, 0xcf004058 38 .equ PP5002_COP_CTRL, 0xcf004058
39 .equ PP5020_PROC_ID, 0x60000000 39 .equ PP5020_PROC_ID, 0x60000000
40 .equ PP5020_COP_CTRL, 0x60007004 40 .equ PP5020_COP_CTRL, 0x60007004
41 41
42start: 42start:
43#ifndef BOOTLOADER
44/* Zero out IBSS */
45 ldr r2, =_iedata
46 ldr r3, =_iend
47 mov r4, #0
481:
49 cmp r3, r2
50 strhi r4, [r2], #4
51 bhi 1b
52
53/* Copy the IRAM */
54 ldr r2, =_iramcopy
55 ldr r3, =_iramstart
56 ldr r4, =_iramend
571:
58 cmp r4, r3
59 ldrhi r5, [r2], #4
60 strhi r5, [r3], #4
61 bhi 1b
62#endif
63
64 /* Initialise bss section to zero */
65 ldr r2, =_edata
66 ldr r3, =_end
67 mov r4, #0
681:
69 cmp r3, r2
70 strhi r4, [r2], #4
71 bhi 1b
72
73 /* Set up some stack and munge it with 0xdeadbeef */
74 ldr sp, =stackend
75 mov r3, sp
76 ldr r2, =stackbegin
77 ldr r4, =0xdeadbeef
781:
79 cmp r3, r2
80 strhi r4, [r2], #4
81 bhi 1b
82
83#ifdef BOOTLOADER
84 /* TODO: the high part of the address is probably dependent on CONFIG_CPU.
85 Since we tend to use ifdefs for each chipset target
86 anyway, we might as well just hardcode it here.
87 */
88
43 /* get the high part of our execute address */ 89 /* get the high part of our execute address */
44 ldr r0, =0xff000000 90 ldr r0, =0xff000000
45 and r8, pc, r0 @ r8 is used later 91 and r8, pc, r0 @ r8 is used later
46 92
47#ifdef BOOTLOADER
48
49#if CONFIG_CPU==PP5002 93#if CONFIG_CPU==PP5002
50 mov r0, #PP5002_PROC_ID 94 mov r0, #PP5002_PROC_ID
51#else 95#else
@@ -75,15 +119,6 @@ cop_wake_start:
75 ldr pc, [r0] 119 ldr pc, [r0]
76 120
771: 1211:
78 /* setup some stack and munge it with 0xdeadbeef */
79 ldr sp, =_stackend
80 mov r3, sp
81 ldr r2, =_stackbegin
82 ldr r4, =0xdeadbeef
83.mungeloop:
84 str r4, [r2], #4
85 cmp r2, r3
86 bne .mungeloop
87 122
88 /* get the high part of our execute address */ 123 /* get the high part of our execute address */
89 ldr r2, =0xffffff00 124 ldr r2, =0xffffff00
@@ -103,15 +138,6 @@ cop_wake_start:
103 ldr pc, =start_loc /* jump to the relocated start_loc: */ 138 ldr pc, =start_loc /* jump to the relocated start_loc: */
104 139
105start_loc: 140start_loc:
106 /* Initialise bss section to zero */
107 ldr r3, =_bssstart
108 ldr r1, =_bssend
109 mov r2, #0x0
110
1111:
112 cmp r3, r1
113 strcc r2, [r3], #4
114 bcc 1b
115 141
116 /* execute the loader - this will load an image to 0x10000000 */ 142 /* execute the loader - this will load an image to 0x10000000 */
117 bl main 143 bl main
@@ -158,8 +184,9 @@ boot_table:
158 /* here comes the boot table, don't move its offset */ 184 /* here comes the boot table, don't move its offset */
159 .space 400 185 .space 400
160#else 186#else
161 /* TODO: Implement startup code */ 187 /* Non-bootloader startup code */
162 188 ldr r0, =main
189 mov pc, r0
163#endif /* BOOTLOADER (iPod) */ 190#endif /* BOOTLOADER (iPod) */
164 191
165#elif CONFIG_CPU == TCC730 192#elif CONFIG_CPU == TCC730