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authorAmaury Pouly <amaury.pouly@gmail.com>2012-05-19 13:35:15 +0200
committerAmaury Pouly <amaury.pouly@gmail.com>2012-05-19 16:10:52 +0200
commit70253f80bc90a03b5fff535b35e51640f592f975 (patch)
treecb9ffc4c62766dc8552cb3f0fb210940851af6c5
parent07138ba2ba08ce586486baab081aa455eb021fea (diff)
downloadrockbox-70253f80bc90a03b5fff535b35e51640f592f975.tar.gz
rockbox-70253f80bc90a03b5fff535b35e51640f592f975.zip
imx233: fix i2c to be more correct
Change-Id: Ib707a0b87d01f24eeccc39c6cbc1c015456fd503
-rw-r--r--firmware/target/arm/imx233/i2c-imx233.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/firmware/target/arm/imx233/i2c-imx233.c b/firmware/target/arm/imx233/i2c-imx233.c
index c58494154f..fd9801ec1d 100644
--- a/firmware/target/arm/imx233/i2c-imx233.c
+++ b/firmware/target/arm/imx233/i2c-imx233.c
@@ -55,7 +55,8 @@ void INT_I2C_DMA(void)
55 55
56void imx233_i2c_init(void) 56void imx233_i2c_init(void)
57{ 57{
58 imx233_reset_block(&HW_I2C_CTRL0); 58 //imx233_reset_block(&HW_I2C_CTRL0);
59 __REG_SET(HW_I2C_CTRL0) = __BLOCK_SFTRST;
59 /* setup pins (must be done when shutdown) */ 60 /* setup pins (must be done when shutdown) */
60 imx233_pinctrl_acquire_pin(0, 30, "i2c"); 61 imx233_pinctrl_acquire_pin(0, 30, "i2c");
61 imx233_pinctrl_acquire_pin(0, 31, "i2c"); 62 imx233_pinctrl_acquire_pin(0, 31, "i2c");
@@ -124,12 +125,12 @@ enum imx233_i2c_error_t imx233_i2c_end(unsigned timeout)
124 i2c_stage[i2c_nr_stages - 1].dma.cmd |= HW_APB_CHx_CMD__SEMAPHORE | HW_APB_CHx_CMD__IRQONCMPLT; 125 i2c_stage[i2c_nr_stages - 1].dma.cmd |= HW_APB_CHx_CMD__SEMAPHORE | HW_APB_CHx_CMD__IRQONCMPLT;
125 126
126 __REG_CLR(HW_I2C_CTRL1) = HW_I2C_CTRL1__ALL_IRQ; 127 __REG_CLR(HW_I2C_CTRL1) = HW_I2C_CTRL1__ALL_IRQ;
128 imx233_dma_reset_channel(APB_I2C);
127 imx233_icoll_enable_interrupt(INT_SRC_I2C_DMA, true); 129 imx233_icoll_enable_interrupt(INT_SRC_I2C_DMA, true);
128 imx233_dma_enable_channel_interrupt(APB_I2C, true); 130 imx233_dma_enable_channel_interrupt(APB_I2C, true);
129 imx233_dma_reset_channel(APB_I2C);
130 imx233_dma_start_command(APB_I2C, &i2c_stage[0].dma); 131 imx233_dma_start_command(APB_I2C, &i2c_stage[0].dma);
131 132
132 enum imx233_i2c_error_t ret ; 133 enum imx233_i2c_error_t ret;
133 if(semaphore_wait(&i2c_sema, timeout) == OBJ_WAIT_TIMEDOUT) 134 if(semaphore_wait(&i2c_sema, timeout) == OBJ_WAIT_TIMEDOUT)
134 { 135 {
135 imx233_dma_reset_channel(APB_I2C); 136 imx233_dma_reset_channel(APB_I2C);